AT84CS001VTP E2V, AT84CS001VTP Datasheet - Page 14
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AT84CS001VTP
Manufacturer Part Number
AT84CS001VTP
Description
Manufacturer
E2V
Datasheet
1.AT84CS001VTP.pdf
(35 pages)
Specifications of AT84CS001VTP
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 110C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT84CS001VTP
Manufacturer:
E2V
Quantity:
20 000
3.10
3.11
14
Built-in Self Test (BIST)
Data Rate vs. Modes
0809E–BDC–05/09
A pattern generator might be activated by means of the BIST input. The BIST is activated on logic LOW
(grounded), and deactivated on logic HIGH (10 KΩ to ground, or tied to V
When activated, the digital outputs correspond to a sequence of 0 and 1. Each bit is toggled at the clock
rate.
For proper operation of pattern Built-In Test, the minimum V
The following table describes the frequency of the Data Ready output signal according to the 8 modes,
assuming a 500 MHz DEMUX input clock.
Table 3-6.
The following table describes the maximum input data rate guaranteed depending on CLK TYPE, DR
TYPE and RatioSel settings.
Table 3-7.
DEMUX Ratio
CLK TYPE
CLK
CLK/2
CLK TYPE
CLK/2
CLK
Data Ready Output Frequency (MHz)
Maximum Input Data Rate
250
500
DR
DR TYPE
DR/2
DR/2
DR
DR
1:2
Data Ready Output Frequency (MHz)
DR/2
125
250
RatioSel
1:2
1:4
1:2
1:4
1:2
1:4
1:2
1:4
CCD
voltage should be 3.3V.
125
250
DR
CCD
Maximum Input Data
1:4
Rate Guaranteed
= 3.3V, or left floating).
e2v semiconductors SAS 2009
(Gsps)
1.8
2.2
1.0
2.0
1.2
1.2
1.0
1.2
DR/2
AT84CS001
62,5
125