DJLXT380LE.B4 Cortina Systems Inc, DJLXT380LE.B4 Datasheet - Page 31

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DJLXT380LE.B4

Manufacturer Part Number
DJLXT380LE.B4
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of DJLXT380LE.B4

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DJLXT380LE.B4
Manufacturer:
Intel
Quantity:
10 000
2.13
2.13.1
2.13.2
2.13.3
Datasheet
Note: There are two status monitor registers: the LOS (04H) and the DFM (05H).
Interrupt Handling
Interrupt Sources
There are two interrupt sources:
Interrupt Enable
The LXT380 provides a latched interrupt output (INT). An interrupt occurs any time there is a
transition on any enabled bit in the status register. Register 06H is the LOS interrupt enable register
and register 07H is the DFM enable register. Writing a logic “1” into the enable register will enable
the respective bit in the respective interrupt status register to generate an interrupt. The power-on
default value is all zeroes. The setting of the interrupt enable bit does not affect the operation of the
status registers.
Registers 08H and 09H are the LOS and DFM (respectively) interrupt status registers. When there
is a transition on any enabled bit in a status register, the associated bit of the interrupt status register
is set and an interrupt is generated (if one is not already pending). When an interrupt occurs, the
INT pin is asserted Low. The output stage of the INT pin consists only of a pull-down device; an
external pull-up resistor of approximately 10k ohm is required to support wired-OR operation.
Interrupt Clear
When an interrupt occurs, the interrupt service routine (ISR) should read both interrupt status
registers (08H and 09H) to identify the interrupt source. The ISR should then read the
corresponding status monitor register to obtain the current status of the device.
Reading either status monitors register will clear its corresponding interrupts on the rising edge of
the read or data strobe. When all pending interrupts are cleared, will the INT pin goes High.
1. Status change in the Loss of Signal (LOS) status register (04H.) The LXT380’S analog/digital
2. Status change in the Driver Failure Monitoring (DFM) status register (05H.) The LXT380’S
loss of signal processor continuously monitors the receiver signal and updates the specific
LOS status bit to indicate presence or absence of a LOS condition.
smart power driver circuit continuously monitors the output drivers signal and updates the
specific DFM status bit to indicate presence or absence of a secondary driver short circuit
condition.
Octal E1 G.703 Transceiver — LXT380
31

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