DJLXT380LE.B4 Cortina Systems Inc, DJLXT380LE.B4 Datasheet - Page 14

• Manufacturer Part Number: DJLXT380LE.B4
• Manufacturer: Cortina Systems Inc

Specifications of DJLXT380LE.B4

• Lead Free Status / RoHS Status: Not Compliant

LXT380 — Octal E1 G.703 Transceiver
14
Table 1.
LXT380 Pin Description
LQFP
† DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output S:
Pin #
21
22
23
24
25
26
27
28
29
30
30
31
31
32
33
33
34
34
35
36
37
37
38
38
39
Power Supply; N.C.: Not Connected.
PBGA
Pin #
M1
M2
M2
M3
M3
G2
H3
H2
K1
K3
N1
N2
N2
N3
N3
P1
L1
L2
L2
L3
L3
J4
J3
J2
J1
TDATA1
TDATA0
Symbol I/O
LOOP0/
LOOP1/
LOOP2/
LOOP3/
LOOP4/
LOOP5/
LOOP6/
LOOP7/
RPOS1
RNEG1
TPOS1
TNEG1
RDATA
TPOS0
TNEG0
TCLK1
RCLK1
TCLK0
RCLK0
UBS1
BPV1
LOS1
UBS0
D0
D1
D2
D3
D4
D5
D6
D7
1
DO Receive Clock Output.
DO
DO
DO
DO
DO Loss of Signal Output.
DO Receive Clock Output.
DI/
DI/
DI/
DI/
DI/
DI/
DI/
DI/
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
O
O
O
O
O
O
O
O
†
Loopback Mode Select/Parallel Data bus Input & Output.
Host mode:
When a non-multiplexed microprocessor interface is selected, these pins
function as a bi-directional 8-bit data port.
When a multiplexed microprocessor interface is selected, these pins carry
both bi-directional 8-bit data and address inputs A0–A7.
In serial Mode, D0-7 should be grounded.
Hardware mode:
These pins are inputs that select the loopback mode for transceiver ports 0-7
respectively as follows:
Normal operation (no loopback) is selected when pin is left open
(unconnected).
Remote loopback mode is selected when pin is Low. In this mode, data on
TPOS and TNEG is ignored and data received on RTIP and RRING is looped
around and retransmitted on TTIP and TRING.
Analog local loopback mode is selected when pin is High. In this mode, data
received on RTIP and RRING is ignored and data transmitted on TTIP and
TRING is internally looped around and routed back to the receive inputs.
Note: When these inputs are left open, they stay in a high impedance state.
Transmit Clock Input.
Transmit Positive Data Input.
Transmit Data Input.
Transmit Negative Data Input.
Unipolar/Bipolar Select Input.
Receive Positive Data Output.
Receive Data Output.
Receive Negative Data Output.
Bipolar Violation Detect Output.
Transmit Clock Input.
Transmit Positive Data Input.
Transmit Data Input.
Transmit Negative Data Input.
Unipolar /Bipolar Select Input.
Therefore, the layout design should not route signals with fast
transitions near the LOOP pins. This practice will minimize capacitive
coupling.
Description
Datasheet