LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 345

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.5.2.24
31:18
17:16
BITS
15:0
RESERVED
Backoff Reset RX/TX
Half duplex-only. Determines when the truncated binary exponential backoff
attempts counter is reset.
00 = Reset on successful transmission (IEEE standard)
01 = Reset on successful reception
1X = Reset on either successful transmission or reception
Pause Time Value
The value that is inserted into the transmitted pause packet when the switch
wants to “XOFF” its link partner.
Port x MAC Transmit Flow Control Settings Register (MAC_TX_FC_SETTINGS_x)
This read/write register configures the flow control settings of the port.
Register #:
Port0: 0441h
Port1: 0841h
Port2: 0C41h
DESCRIPTION
DATASHEET
345
Size:
32 bits
TYPE
R/W
R/W
RO
Revision 1.7 (06-29-10)
DEFAULT
FFFFh
00b
-