SCAN90CP02SPX National Semiconductor, SCAN90CP02SPX Datasheet - Page 6

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SCAN90CP02SPX

Manufacturer Part Number
SCAN90CP02SPX
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of SCAN90CP02SPX

Array Configuration
2x2
Number Of Arrays
1
Differential Data Transmission
Yes
Power Supply Requirement
Single
Operating Supply Voltage (typ)
3.3V
Package Type
LLP EP
Pin Count
28
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Cascading Capability
No
On-chip Buffers
No
On-chip Decoder
No
On-chip Latch Circuit
No
On-chip Mux/demux
No
Programmable
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Output Level
LVDS
Lead Free Status / RoHS Status
Not Compliant
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LVDS OUTPUT DC SPECIFICATIONS (OUT0±, OUT1±)
V
ΔV
V
ΔV
I
C
SUPPLY CURRENT (Static)
I
I
I
I
SWITCHING CHARACTERISTICS—LVDS OUTPUTS (Figures 3, 4)
t
t
t
t
t
t
t
t
t
t
Symbol
OS
CC0
CC1
CC2
CCZ
LHT
HLT
PLHD
PHLD
SKD1
SKCC
JIT
ON
OFF
SW
OD
OS
OUT2
OD
OS
Differential Output Voltage,
0% Pre-emphasis (Note 5)
Change in V
Complementary States
Offset Voltage (Note 6)
Change in V
Complementary States
Output Short Circuit Current, One
Complementary Output
Output Capacitance
Supply Current
Supply Current - one channel
powered down
Supply Current - one input powered
down
TRI-STATE Supply Current
Differential Low to High Transition
Time
Differential High to Low Transition
Time
Differential Low to High Propagation
Delay
Differential High to Low Propagation
Delay
Pulse Skew
Output Channel to Channel Skew
Jitter (0% Pre-emphasis)
(Note 7)
LVDS Output Enable Time
LVDS Output Disable Time
LVDS Switching Time
SELx to OUT±
Parameter
OD
OS
between
between
R
OUT+ or OUT− Short to GND
OUT+ or OUT− to GND when TRI-
STATE
All inputs and outputs enabled and
active, terminated with differential load of
100Ω between OUT+ and OUT-.
Single channel crossover switch or single
channel repeater modes (1 channel
active, one channel in power down mode)
Splitter mode (One input powered down,
both outputs active)
Both input/output Channels in Power
Down Mode
Use an alternating 1 and 0 pattern at 200
Mb/s, measure between 20% and 80% of
V
Use an alternating 1 and 0 pattern at 200
Mb/s, measure at 50% V
input to output.
|t
Difference in propagation delay (t
t
Splitter mode (any one input to all
outputs).
RJ - Alternating 1/0 @ 750 MHz (Note 8)
DJ - K28.5 Pattern
TJ - PRBS 2
Time from ENx to OUT± change from
TRI-STATE to active.
Time from ENx to OUT± change from
active to TRI-STATE.
Time from configuration select (SELx) to
new switch configuration effective for
OUT±.
PHLD
PLHD
OD
L
1.5 Gbps (Note 9)
1.5 Gbps (Note 10)
= 100Ω between OUT+ and OUT−
.
) among all output channels in
–t
®
PHLD
|
23
Conditions
-1 Pattern
6
OD
between
PLHD
LQFP
LQFP
LLP
LLP
or
1.09
Min
250
−35
−35
0.5
0.5
70
50
50
0
(Note 4)
1.25
Typ
400
−60
150
135
130
110
113
110
110
5.5
1.4
2.4
2.4
1.4
42
22
30
55
42
93
5
1.475
Max
575
215
180
120
315
140
148
126
150
150
-90
2.5
3.5
3.5
2.5
35
35
60
30
40
75
12
psrms
Units
psp-p
psp-p
psp-p
psp-p
mV
mV
mV
mA
mA
mA
mA
mA
pF
ps
ps
ns
ns
ps
ps
ns
ns
ns
V

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