MM58274CN-12 National Semiconductor, MM58274CN-12 Datasheet - Page 7

• Manufacturer Part Number: MM58274CN-12
• Manufacturer: National Semiconductor

Specifications of MM58274CN-12

• Bus Type: Parallel
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 16
• Mounting: Through Hole
• Date Format: DW:DM:M:Y
• Time Format: HH:MM:SS:hh
• Lead Free Status / RoHS Status: Not Compliant

Functional Description
Day of Week Counter
The day of week counter increments as the time rolls from
(11 59 PM to 12 00 AM) It counts from 1 to 7 and rolls back
to 1 Any day of the week may be specified as day 1
Clock Setting Register Interrupt Register
The interrupt select bit in the control register determines
which of these two registers is accessible to the processor
at address 15 Normal clock and interrupt timing operations
will always continue regardless of which register is selected
onto the bus The layout of these registers is shown in
Table II
The clock setting register is comprised of three separate
functions
a) leap year counter bits 2 and 3
b) AM PM indicator bit 1
c) 12-hour mode set bit 0 (see Table IIA)
The leap year counter is a 2-stage binary counter which
is clocked by the months counter It changes state as the
time rolls over from 11 59 on December 31 to 00 00 on
January 1
The counter should be loaded with the ‘number of years
since last leap year’ e g if 1980 was the last leap year a
clock programmed in 1983 should have 3 stored in the leap
year counter If the clock is programmed during a leap year
then the leap year counter should be set to 0 The contents
of the leap year counter can be read by the P
Leap Year Counter
AM PM Indicator
12-Hour Bit
No Interrupt
0 1 Second
0 5 Second
1 Second
5 Seconds
10 Seconds
30 Seconds
60 Seconds
Timing Accuracy single interrupt mode (all time delays)
Repeated Mode
with first interrupt (i e timing errors do not accumulate)
Function
Function
g
1 ms on initial timeout thereafter synchronous
Interrupt output cleared
start stop bit set to 1
DB3
DB3
DB3
X
e
e
0 for single interrupt
1 for repeated interrupt
Comments
(Continued)
TABLE IIA Clock Setting Register Layout
DB2
TABLE IIB Interrupt Control Register
Data Bits Used
X
DB1
X
g
1 ms
7
be set in the same write operation See the section on Ini-
setting routine
The AM PM indicator returns a logic 0 for AM and a logic 1
for PM It is clocked when the hours counter rolls from 11 59
to 12 00
The 12-hour mode bit is set to logic 0 for 12-hour mode
logic 1 is illegal
IMPORTANT NOTE Hours mode and AM PM bits cannot
tialization (Methods of Device Operation) for a suggested
All bits in the clock setting register may be read by the proc-
essor
The interrupt register controls the operation of the timer for
interrupt output The processor programs this register for
single or repeated interrupts at the selected time intervals
The lower three bits of this register set the time delay period
that will occur between interrupts The time delays that can
be programmed and the data words that select these are
outlined in Table IIB
Data bit 3 of the interrupt register sets for either single or
repeated interrupts logic 0 gives single mode logic 1 sets
for repeated mode
Using the interrupt is described in the Device Operation sec-
tion
DB3
0 1
0 1
0 1
0 1
0 1
0 1
0 1
DB0
X
X
0 Indicates a Leap Year
0
0
1
DB2
e
e
e
0
0
0
0
1
1
1
1
AM 1
12-Hour Mode
Illegal
Control Word
Comments
e
PM
DB1
0
0
1
1
0
0
1
1
Access
R W
R W
R W
DB0
0
1
0
1
0
1
0
1