CY2DP3110AI Cypress Semiconductor Corp, CY2DP3110AI Datasheet
CY2DP3110AI
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CY2DP3110AI Summary of contents
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... CLKB CLKB# VEE CLK_SEL VEE VBB Cypress Semiconductor Corporation Document #: 38-07469 Rev. *I Functional Description The CY2DP3110 is a low-skew, low propagation delay 2-to-10 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The device is implemented on SiGe technology and has a fully differential internal architecture that is optimized to achieve low signal skews at operating frequencies ...
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Pin Definitions Pin Name 2 CLK_SEL 3 CLKA 4 CLKA# 5 VBB 6 CLKB, 7 CLKB# 8 VEE 1,9,16, VCC 25,32 31,29,27,24,22,20,18, Q(0:9) 15,13,11 30,28,26,23,21,19,17, Q#(0:9) 14,12,10 Table 1. Control CLK_SEL 0 CLKA, CLKA# input pair is ...
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Absolute Maximum Ratings Parameter Description V Positive Supply Voltage CC V Negative Supply Voltage EE T Temperature, Storage S T Temperature, Junction J ESD ESD Protection h M Moisture Sensitivity Level SL Gate Count Total Number of Used Gates Multiple ...
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ECL DC Electrical Specifications Parameter Description V Negative Power Supply EE V ECL Input Differential Cross Point CMR [8] Voltage V Output High Voltage OH V Output Low Voltage –3.3V ± –2.5V ± ...
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Timing Definitions > ...
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Test Configuration Standard test load using a differential pulse generator and differential measurement instrument ...
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Applications Information Termination Examples Figure 7. Standard LVPECL – PECL Output Termination Figure ...
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... Figure 10. Termination for LVPECL to HTSL interface for VCC=2.5V would use X=50 Ohms, Y=2300 Ohms, and Z=1000 Ohms. See application note titled, “PECL Translation, SAW Oscillators, and Specs” for other signalling Ordering Information Part Number CY2DP3110AI CY2DP3110AIT Lead-free CY2DP3110AXI CY2DP3110AXIT Document #: 38-07469 Rev. *I ...
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... Document #: 38-07469 Rev. *I © Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...
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Document History Page Document Title: CY2DP3110 FastEdge™ Series 1 of 2:10 Differential Clock/Data Fanout Buffer Document Number: 38-07469 REV. ECN NO. Issue Date ** 121284 11/12/02 *A 126251 04/15/03 *B 127696 06/12/03 *C 128731 08/04/03 *D 130299 11/19/03 *E 227708 ...