MT48LC4M16A2TG-75 IT:G Micron Technology Inc, MT48LC4M16A2TG-75 IT:G Datasheet - Page 55
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MT48LC4M16A2TG-75 IT:G
Manufacturer Part Number
MT48LC4M16A2TG-75 IT:G
Description
DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V 54-Pin TSOP-II Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC4M16A2TG-75_ITG.pdf
(72 pages)
Specifications of MT48LC4M16A2TG-75 IT:G
Density
64 Mb
Maximum Clock Rate
133 MHz
Package
54TSOP-II
Address Bus Width
14 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
6|5.4 ns
Operating Temperature
-40 to 85 °C
Organization
4Mx16
Address Bus
14b
Access Time (max)
6/5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
140mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant
Figure 38:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
DQML, DQMH
COMMAND
A0–A9, A11
DQM /
BA0, BA1
Auto Refresh Mode
CKE
A10
CLK
DQ
High-Z
Notes:
Precharge all
t CKS
active banks
t CMS
t AS
SINGLE BANK
ALL BANKS
BANK(S)
PRECHARGE
T0
t AH
t CKH
t CMH
t CK
1. Each AUTO REFRESH command performs a refresh cycle. Back-to-back commands are not
required.
t RP
T1
NOP
T2
REFRESH
AUTO
t CH
t RFC 1
55
NOP
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CL
Tn + 1
REFRESH
AUTO
t RFC 1
NOP
64Mb: x4, x8, x16 SDRAM
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NOP
©2000 Micron Technology, Inc. All rights reserved.
Timing Diagrams
To + 1
ACTIVE
ROW
ROW
BANK
DON’T CARE