PI6C3991-5JE Pericom Semiconductor, PI6C3991-5JE Datasheet - Page 5

• Manufacturer Part Number: PI6C3991-5JE
• Description: Phase Locked Loops (PLL) Programmable Skew Zero Delay
• Manufacturer: Pericom Semiconductor
• Type: Zero Delay Programmable PLL Clock Bufferr

Specifications of PI6C3991-5JE

• Number Of Circuits: 1
• Output Frequency Range: 3.75 MHz to 80 MHz
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 2.97 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: PLCC-32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Switching Characteristics PI6C3991
Notes:
7.
8.
9.
10. t
11. t
12. C
13. There are three classes of outputs: Nominal (multiple of t
14. t
15. t
16. Specified with outputs loaded with 30pF for the PI6C3991 and PI6C3991-5 devices. Devices are terminated through 50 Ohm to V
17. t
18. t
P
t
a
S
t
t
t
t
t
t
t
t
t
t
S
S
S
S
S
t
a r
f
O
R
K
O
t
O
R
t
L
t
N
K
K
K
K
P
K
D
P
t
P
F
O
t
P
E
Test measurement levels for the PI6C3991 are TTL levels (1.5V to 1.5V). Test conditions assume signal transition times of 2ns or less
and output loading as shown in the AC Test Loads and Waveforms unless otherwise specified.
Guaranteed by statistical correlation. Tested initially and after any design or process changes that may affect these parameters.
SKEW is defined as the time between the earliest and the latest output transition among all outputs for which the same t
been selected when all are loaded with 30pF and terminated with 50 Ohm to V
(3Qx and 4Qx only in Divide-by-2 or Divide-by-4 mode).
etc.)
specifications.
2. t
normal operating limits. This parameter is measured from the application of a new signal or frequency at REF or FB until t
specified limits.
t
P
D
R
W
R J
m
O
W
U
E
E
E
E
SKEWPR
SKEW0
DEV
ODCV
ORISE
LOCK
W
E
E
A
W
W
D
C
S I
C
M
W
W
W
W
W
V
L
H
L
t e
L
K
H
L
V
P
E
L
PWH
0
1
2
3
4
= 0pF. For C
R
r e
is the output-to-output skew between any two devices operating under the same conditions (V
is the time that is required before synchronization is achieved. This specification is valid only after V
and t
O
C
O
O
O
O
O
O
O
O
O
C
O
is the deviation of the output from a 50% duty cycle. Output pulse width variations are included in t
n i
R
R
r P
e Z
e Z
D
r P
P
is defined as the skew between outputs when they are selected for 0t
is measured at 2.0V. t
L
o l
E
E
c y
p
u
u
u
u
e
u
u
u
u
u
u
M
g o
p o
o r
o r
is defined as the skew between a pair of outputs (XQ0 and XQ1) when all eight outputs are selected for 0t
p t
p t
p t
p t
i v
p t
p t
p t
p t
p t
L
p t
r e
F
F
k c
- e l
H
e c
a r
t u
t u
t u
t u
g a
t u
t u
t u
t u
t u
t u
i t a
L
P
P
O
O
OFALL
z
o
o t
F
u
u
m
t -
i t a
g n
u
u
S
S
S
S
D
H
L
R
F
t i J
e s l
e s l
k c
e r
m
- o
c -
p t
p t
e k
e k
e k
e k
O
e s i
l l a
u
G I
n o
r e t
u q
b a
y t
t u
t u
c y
D
L
W
T
W
W
w
w
w
w
H
T
m i
n e
T
e l
e
D
= 30pF, t
e l
C
M
S
m i
d i
d i
i v
m i
R (
R (
R (
R (
T
e k
e
T
e
measured between 0.8V and 2.0V.
y c
c y
S
e c
h t
h t
t a
m i
e
a l
m i
1 (
e
e s i
s i
e s i
s i
e k
(
w
e l
h c
, y
(
6 1
) 8
e
H
L
- e
- e
e
6 1
D
w
R -
R -
1 ,
O
d e
V
A (
R
D
G I
D
1 ,
a F
a F
e k
) 7
i r a
E
W
e
U
s i
s i
) 7
e
P -
l l
H
, l l
, l l
i v
w
F
i v
, e
, e
i t a
t i n
SKEW0
O
i t a
r i a
8 (
i t a
N
N
R
a F
a F
n o
t u
1 ,
n o
e s i
n o
o
o
D
S
u p
) 4
PWL
1 (
- l l
m
- l l
m
e k
e
) 5
f
o t
f
) s t
a F
n i
a F
n i
o r
c s
o r
w
- l a
- l a
m
, l l
, l l
F
m
= 0.35ns.
i r
9 (
is measured at 0.8V.
X (
B
n I
D
t p
F
1 ,
0 5
F
a S
i D
0 5
e P
F
i v i
e v
S
Q
) 1
R
o i
S
S
e f f
%
m
%
e d
k a
e s i
e t r
n
, 0
=
=
=
e
1 (
R
e r
t -
, d
1 (
H
L
, d
X
) 6
M
C
M
t n
- o
) 6
(Over the Operating Range)
O
G I
Q
a l
D
S
D
D I
C
e p
W
s s
(
) 1
v i
H
i v i
) 8
a l
d i
k a
(
O
(
e d
s s
, 1
(
9 (
, 1
, 1
d e
(
) 2
1 ,
t u
) 8
) 2
- d
) 2
O
I -
) 0
u p
D
t u
v n
) s t
i v i
u p
t r e
e d
) s t
9 (
d e
1 ,
) d
9 (
9 (
U
) 3
9 (
1 ,
1 ,
) 3
delay), Inverted (4Q0 and 4Q1 only with 4F0 = 4F1 = HIGH), and Divided
1 ,
) 3
) 3
5
–
–
M
. 0
. 0
5
5
. 0
. 0
5 2
0 4
5 1
0 .
0 .
5 1
5 1
. n i
5 2
5 6
P
S
(2,7)
6 I
e e
C
T
. 0
. 0
0
0
0
0
0
0
1
1
T
3.3V High-Speed, Low-Voltage Programmable
9 3
y
5 0
1 .
1 .
5 .
5 2
5 .
0 .
0 .
0 .
0 .
b a
. p
1 9
e l
U
2 -
. Other outputs are divided or inverted but not shifted.
1
CC
+
+
M
. 0
. 1
2
0
0
1
0
0
. 0
. 0
2
1
1
1
0
0 3
0 5
0 8
5 2
0 0
a
/2.
2 .
5 2
5 .
0 .
5 .
9 .
5 2
0 .
5 .
2 .
2 .
5 .
5 2
5 6
. x
M
0 –
1 –
. 0
. 0
5
5
0 4
5 1
5 2
0 .
0 .
5 1
5 1
. n i
Skew Clock Buffer - SuperClock
5 .
0 .
P
S
6 I
e e
C
T
. 0
T
0
0
0
0
0
0
0
1
1
9 3
y
b a
5 2
6 .
5 .
5 .
5 .
0 .
0 .
1 .
0 .
0 .
. p
1 9
e l
CC
5 -
1
M
+
+
. 0
. 1
2
0
0
1
0
1
2
3
1
1
0
0 3
0 5
0 8
5 2
0
1
0 0
a
ambient temperature, air flow,
5 2
5 .
7 .
0 .
7 .
0 .
5 2
5 .
0 .
5 .
5 .
5 .
5 .
0 .
. x
M
0 –
1 –
. 0
. 0
5
5
5 2
0 4
5 1
0 .
0 .
5 1
5 1
. n i
7 .
2 .
CC
S
P
e e
6 I
SKEW2
is stable and within
T
C
0
0
0
0
0
T
0
1
1
1
1
y
1 .
3 .
6 .
0 .
7 .
2 .
0 .
0 .
5 .
5 .
b a
9 3
. p
PS8450D
e l
U
1 9
.
1
PI6C3991
M
and t
+
+
. 0
. 0
. 1
U
PD
2
3
2
2
0
1
1
1
1
0 3
0 5
0 8
5 2
0
1
3
0 0
a
5 2
5 7
5 .
5 .
5 .
5 .
0 .
5 .
2 .
7 .
5 6
2 .
delay has
7 .
. x
is within
SKEW4
11/12/08
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n
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