ATA5812-PLQW80 Atmel, ATA5812-PLQW80 Datasheet - Page 55
![RF Transceiver RF Data Control Transceiver](/photos/30/99/309912/qfn-48_sml.jpg)
ATA5812-PLQW80
Manufacturer Part Number
ATA5812-PLQW80
Description
RF Transceiver RF Data Control Transceiver
Manufacturer
Atmel
Datasheet
1.ATA5811-PLHC.pdf
(92 pages)
Specifications of ATA5812-PLQW80
Wireless Frequency
226 KHz
Interface Type
4-Wire SPI
Noise Figure
7 dB
Output Power
10 dBm
Operating Supply Voltage
2.4 V to 5.25 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-48
Maximum Data Rate
20 Kbps
Minimum Operating Temperature
- 40 C
Modulation
ASK, FSK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 11-6. Timing Diagram for Failed Bit-check (Condition CV_Lim < Lim_min)
Figure 11-7. Timing Diagram for Failed Bit-check (Condition: CV_Lim
11.1.6
4689F–RKE–08/06
Bit-check counter
Bit-check counter
Duration of the Bit-check
(Lim_min = 14, Lim_max = 24)
(Lim_min = 14, Lim_max = 24)
RX_ACTIVE
RX_ACTIVE
Demod_Out
Demod_Out
Bit check
Bit check
T
Start-up mode
T
Start-up mode
Startup_Sig_Proc
Startup_Sig_Proc
If no transmitter is present during the Bit-check, the output of the ASK/FSK demodulator delivers
random signals. The Bit-check is a statistical process and T
fore, an average value for T
the selected bit rate range and on T
T
In the presence of a valid transmitter signal, T
nal, f
period for T
Bit-check
0
0
Sig
, and the count of the bits, N
Bit check failed (CV_Lim < Lim_min)
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 101112
resulting in a lower current consumption in RX polling mode.
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 101112
Bit-check
Bit check mode
requiring a higher value for the transmitter preburst T
T
Bit_check
1/2 Bit
1/2 Bit
Bit check mode
Bit check failed (CV_Lim < Lim_min)
Bit-check
T
Bit_check
is given in the electrical characteristics. T
Bit-check
XDCLK
131415161718192021222324
. A higher value for N
. A higher bit-rate range causes a lower value for
Bit-check
Lim_max)
is dependent on the frequency of that sig-
Sleep mode
Bit-check
T
ATA5811/ATA5812
Sleep
0
Bit-check
varies for each check. There-
Sleep mode
T
thereby results in a longer
Sleep
0
Preburst
Bit-check
.
depends on
55
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