ATA5812-PLQW80 Atmel, ATA5812-PLQW80 Datasheet - Page 43
![RF Transceiver RF Data Control Transceiver](/photos/30/99/309912/qfn-48_sml.jpg)
ATA5812-PLQW80
Manufacturer Part Number
ATA5812-PLQW80
Description
RF Transceiver RF Data Control Transceiver
Manufacturer
Atmel
Datasheet
1.ATA5811-PLHC.pdf
(92 pages)
Specifications of ATA5812-PLQW80
Wireless Frequency
226 KHz
Interface Type
4-Wire SPI
Noise Figure
7 dB
Output Power
10 dBm
Operating Supply Voltage
2.4 V to 5.25 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-48
Maximum Data Rate
20 Kbps
Minimum Operating Temperature
- 40 C
Modulation
ASK, FSK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9.5
Figure 9-4.
4689F–RKE–08/06
Pin PWR_ON
(Status register)
DVCC, AVCC
Timing Pin PWR_ON, Status Bit Power_On
Power_ON
N_RESET
PWR_ON
VSOUT
CLK
IRQ
To switch the transceiver from OFF to Idle mode, pin PWR_ON must set to 1 (minimum 0.8
V
N_RESET to low and switches on DVCC, AVCC and the power supply for external devices
VSOUT.
If V
sets the status bit Power_On to 1 and an interrupt is issued (T
After the voltage on pin VSOUT exceeds 2.3 V (typically) and the start-up time of the XTO is
elapsed the output clock on pin CLK is available. Because the enabling of pin CLK is asynchro-
nous the first clock cycle may be incomplete. N_RESET is set to high if V
(typically) and the XTO is settled.
If the transceiver is in any active mode (Idle, AUX, RX, RX_Polling, TX), a positive edge on pin
PWR_ON sets Power_On to 1 (after T
erates an interrupt. If Power_On is still 1 during the positive edge on pin PWR_ON no interrupt is
issued. Power_On and the interrupt is deleted after reading the status register.
During Power_On = 1, the bits VSOUT_EN and CLK_ON in control register 3 are set to 1.
Note:
1.5V (typ)
VS2
Mode
OFF
V
DVCC
Thres_2
) for at least T
It is not possible to set the transceiver to OFF mode by setting pin PWR_ON to 0. If pin PWR_ON
is not used, it must be connected to GND.
exceeds 1.5 V (typically) and the XTO is settled, the digital control logic is active and
= 2.38V (typ)
T
T
PWR_ON
PWR_ON_IRQ_1
Mode
IDLE
PWR_ON
> T
V
PWR_ON_IRQ_1
Thres_1
(typ)
(see
= 2.3V
Figure
9-4). The transceiver recognize the positive edge, sets pin
PWR_ON_IRQ_2
T
PWR_ON
IDLE, AUX, RX, RX Polling, TX
> T
T
PWR_ON_IRQ_2
). The state transition Power_On 0
PWR_ON_IRQ_2
Mode
ATA5811/ATA5812
PWR_ON_IRQ_1
VSOUT
).
exceeds 2.38 V
1 gen-
43