NSBC143ZPDXV6T5 ON Semiconductor, NSBC143ZPDXV6T5 Datasheet

NSBC143ZPDXV6T5

Manufacturer Part Number

NSBC143ZPDXV6T5

Description

TRANS BR NPN/PNP DUAL 50V SOT563

Manufacturer

ON Semiconductor

Datasheet

1.NSBC143ZPDXV6T5.pdf (14 pages)

Specifications of NSBC143ZPDXV6T5

Transistor Type

1 NPN, 1 PNP - Pre-Biased (Dual)

Current - Collector (ic) (max)

100mA

Voltage - Collector Emitter Breakdown (max)

50V

Resistor - Base (r1) (ohms)

4.7K

Resistor - Emitter Base (r2) (ohms)

47K

Dc Current Gain (hfe) (min) @ Ic, Vce

80 @ 5mA, 10V

Vce Saturation (max) @ Ib, Ic

250mV @ 1mA, 10mA

Current - Collector Cutoff (max)

500nA

Power - Max

500mW

Mounting Type

Surface Mount

Package / Case

SOT-563, SOT-6

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Frequency - Transition

Other names

NSBC143ZPDXV6T5OS

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NSBC114EPDXV6T1,

NSBC114EPDXV6T5

Dual Bias Resistor

Transistors

NPN and PNP Silicon Surface Mount

Transistors with Monolithic Bias

Resistor Network

a monolithic bias network consisting of two resistors; a series base

resistor and a base−emitter resistor. These digital transistors are

designed to replace a single device and its external resistor bias

network. The BRT eliminates these individual components by

integrating them into a single device. In the NSBC114EPDXV6T1

series, two complementary BRT devices are housed in the SOT−563

package which is ideal for low power surface mount applications

where board space is at a premium.

MAXIMUM RATINGS

and Q

January, 2004 − Rev. 3

THERMAL CHARACTERISTICS

1. FR−4 @ Minimum Pad

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Total Device Dissipation

Derate above 25 C

Thermal Resistance Junction-to-Ambient

Total Device Dissipation

Derate above 25 C

Thermal Resistance Junction-to-Ambient

Junction and Storage Temperature

The BRT (Bias Resistor Transistor) contains a single transistor with

Simplifies Circuit Design

Reduces Board Space

Reduces Component Count

Available in 8 mm, 7 inch Tape and Reel

Lead Free Solder Plating

Semiconductor Components Industries, LLC, 2004

, − minus sign for Q

(Both Junctions Heated)

(One Junction Heated)

Characteristic

Rating

(PNP) omitted)

= 25 C unless otherwise noted, common for Q

Preferred Devices

= 25 C

Symbol

CBO

CEO

, T

qJA

stg

(Note 1)

−55 to

Value

+150

Max

100

357

350

500

250

2.9

4.0

mW/ C

mAdc

Unit

Vdc

C/W

ORDERING INFORMATION

See specific marking information in the device marking table

on page 2 of this data sheet.

NSBC114EPDXV6T1 SOT−563

NSBC114EPDXV6T5 SOT−563

Preferred devices are recommended choices for future use

and best overall value.

Device

DEVICE MARKING INFORMATION

xx = Specific Device Code

(4)

(3)

MARKING DIAGRAM

= Date Code

http://onsemi.com

(see table on page 2)

CASE 463A

SOT−563

PLASTIC

5 4

xx D

Package

(5)

Publication Order Number:

(2)

2 3

NSBC114EPDXV6/D

4000/Tape & Reel

8000/Tape & Reel

4 mm pitch

2 mm pitch

Shipping

(1)

(6)

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