XC3S1600E-4FGG484I Xilinx Inc, XC3S1600E-4FGG484I Datasheet - Page 122
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XC3S1600E-4FGG484I
Manufacturer Part Number
XC3S1600E-4FGG484I
Description
FPGA Spartan®-3E Family 1.6M Gates 33192 Cells 572MHz 90nm (CMOS) Technology 1.2V 484-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S1600E-4FGG484I
Package
484FBGA
Family Name
Spartan®-3E
Device Logic Cells
33192
Device Logic Units
3688
Device System Gates
1600000
Number Of Registers
29504
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
376
Ram Bits
663552
Number Of Logic Elements/cells
33192
Number Of Labs/clbs
3688
Total Ram Bits
663552
Number Of I /o
376
Number Of Gates
1600000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-XA3S1600E-UNI-G - KIT DEVELOPMENT AUTOMOTIVE ECU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S1600E-4FGG484I
Manufacturer:
XILINX
Quantity:
140
Company:
Part Number:
XC3S1600E-4FGG484I
Manufacturer:
XILINX
Quantity:
250
Company:
Part Number:
XC3S1600E-4FGG484I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S1600E-4FGG484I
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
DC and Switching Characteristics
Single-Ended I/O Standards
Table 80: Recommended Operating Conditions for User I/Os Using Single-Ended Standards
122
Notes:
1.
2.
3.
4.
5.
6.
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33_3
PCI66_3
HSTL_I_18
HSTL_III_18
SSTL18_I
SSTL2_I
IOSTANDARD
Descriptions of the symbols used in this table are as follows:
V
V
V
V
The V
For device operation, the maximum signal voltage (V
There is approximately 100 mV of hysteresis on inputs using LVCMOS33 and LVCMOS25 I/O standards.
All Dedicated pins (PROG_B, DONE, TCK, TDI, TDO, and TMS) use the LVCMOS25 standard and draw power from the V
The Dual-Purpose configuration pins use the LVCMOS standard before the User mode. When using these pins as part of a standard 2.5V
configuration interface, apply 2.5V to the V
For information on PCI IP solutions, see
PCI-X IP is supported.
CCO
REF
IL
IH
Attribute
– the input voltage that indicates a Low logic level
– the input voltage that indicates a High logic level
– the reference voltage for setting the input switching threshold
– the supply voltage for output drivers
CCO
(6)
(6)
(4)
(4,5)
rails supply only output drivers, not input circuits.
Min (V)
1.65
3.0
3.0
2.3
1.4
1.1
3.0
3.0
1.7
1.7
1.7
2.3
V
CCO
Nom (V)
for Drivers
3.3
3.3
2.5
1.8
1.5
1.2
3.3
3.3
1.8
1.8
1.8
2.5
www.xilinx.com/pci.
CCO
lines of Banks 0, 1, and 2 at power-on as well as throughout configuration.
Max (V)
(2)
3.465
3.465
3.465
3.465
1.95
2.7
1.6
1.3
1.9
1.9
1.9
2.7
IH
max) may be as high as V
www.xilinx.com
The PCIX IOSTANDARD is available and has equivalent characteristics but no
Min (V)
0.833
1.15
0.8
-
V
these I/O standards
REF
Nom (V)
is not used for
0.900
V
1.25
0.9
1.1
REF
IN
max. See
Max (V)
0.969
1.35
1.1
-
Table
73.
V
V
0.3 • V
0.3 • V
V
V
REF
REF
DS312-3 (v3.8) August 26, 2009
Max (V)
REF
REF
V
0.8
0.8
0.7
0.4
0.4
0.4
- 0.125
- 0.125
IL
- 0.1
- 0.1
CCO
CCO
Product Specification
CCAUX
V
V
0.5 • V
0.5 • V
V
V
REF
REF
REF
REF
Min (V)
V
2.0
2.0
1.7
0.8
0.8
0.7
rail (2.5V).
+ 0.125
+ 0.125
IH
+ 0.1
+ 0.1
CCO
CCO
R