M4A3-256/128-10YC LATTICE SEMICONDUCTOR, M4A3-256/128-10YC Datasheet - Page 41

• Manufacturer Part Number: M4A3-256/128-10YC
• Description: CPLD ispMACH™ 4A Family 10K Gates 256 Macro Cells 83.3MHz/118MHz EECMOS Technology 3.3V 208-Pin PQFP Tray
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of M4A3-256/128-10YC

• Package: 208PQFP
• Family Name: ispMACH™ 4A
• Device System Gates: 10000
• Number Of Macro Cells: 256
• Maximum Propagation Delay Time: 10 ns
• Number Of User I/os: 128
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 83.3|118 MHz
• Number Of Product Terms Per Macro: 20
• Operating Temperature: 0 to 70 °C

I
These curves represent the typical power consumption for a particular device at system frequency. The
selected “typical” pattern is a 16-bit up-down counter. This pattern fills the device and exercises every
macrocell. Maximum frequency shown uses internal feedback and a D-type register. Power/Speed are
optimized to obtain the highest counter frequency and the lowest power. The highest frequency (LSBs) is
placed in common PAL blocks, which are set to high power. The lowest frequency signals (MSBs) are placed
in a common PAL block and set to lowest power.
CC
vs. FREQUENCY
350
300
250
200
150
100
400
250
200
150
100
50
50
0
0
Figure 19. ispMACH 4A I
Figure 20. ispMACH 4A I
V
CC
V
ispMACH 4A Family
CC
= 5 V or 3.3 V, T
Frequency (MHz)
Frequency (MHz)
= 5 V or 3.3 V, T
CC
CC
Curves at High Speed Mode
Curves at Low Power Mode
A
A
= 25º C
= 25º C
M4A-512/160
M4A-384/160
M4A-256/160
M4A-256/128
M4A-192/96
M4A-96/48
M4A-128/64
M4A-64/64
M4A-64/32
M4A-32/32
M4A-512/160
M4A-256/160
M4A-256/128
M4A-192/96
M4A-96/48
M4A-128/64
M4A-64/64
M4A-64/32
M4A-32/32
M4A-384/160
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