M29W160EB7AN6E NUMONYX, M29W160EB7AN6E Datasheet - Page 5

• Manufacturer Part Number: M29W160EB7AN6E
• Description: Flash Mem Parallel 3V/3.3V 16M-Bit 2M x 8/1M x 16 70ns 48-Pin TSOP Tray
• Manufacturer: NUMONYX

Specifications of M29W160EB7AN6E

• Package: 48TSOP
• Cell Type: NOR
• Density: 16 Mb
• Architecture: Sectored
• Block Organization: Asymmetrical
• Location Of Boot Block: Bottom
• Typical Operating Supply Voltage: 3|3.3 V
• Sector Size: 8KByte x 2|16KByte x 1|32KByte x 1|64KByte x 31
• Timing Type: Asynchronous
• Operating Temperature: -40 to 85 °C
• Interface Type: Parallel

SUMMARY DESCRIPTION
The M29W160E is a 16 Mbit (2Mb x8 or 1Mb x16)
non-volatile memory that can be read, erased and
reprogrammed. These operations can be per-
formed using a single low voltage (2.7 to 3.6V)
supply. On power-up the memory defaults to its
Read mode where it can be read in the same way
as a ROM or EPROM.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents.
The end of a program or erase operation can be
detected and any error conditions identified. The
Figure 2. Logic Diagram
A0-A19
BYTE
RP
W
G
E
20
M29W160ET
M29W160EB
V CC
V SS
15
DQ0-DQ14
DQ15A–1
RB
AI06849B
command set required to control the memory is
consistent with JEDEC standards.
The blocks in the memory are asymmetrically ar-
ranged, see Figures 6 and 7, Block Addresses.
The first or last 64 KBytes have been divided into
four additional blocks. The 16 KByte Boot Block
can be used for small initialization code to start the
microprocessor, the two 8 KByte Parameter
Blocks can be used for parameter storage and the
remaining 32K is a small Main Block where the ap-
plication may be stored.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered TSOP48 (12 x 20mm) and
TFBGA48 (0.8mm pitch) packages. The memory
is supplied with all the bits erased (set to ’1’).
Table 1. Signal Names
A0-A19
DQ0-DQ7
DQ8-DQ14
DQ15A–1
E
G
W
RP
RB
BYTE
V
V
NC
CC
SS
Address Inputs
Data Inputs/Outputs
Data Inputs/Outputs
Data Input/Output or Address Input
Chip Enable
Output Enable
Write Enable
Reset/Block Temporary Unprotect
Ready/Busy Output
Byte/Word Organization Select
Supply Voltage
Ground
Not Connected Internally
M29W160ET, M29W160EB
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