M25P20-VMN6PB NUMONYX, M25P20-VMN6PB Datasheet - Page 18
![no-image](/images/manufacturer_photos/0/4/484/numonyx_sml.jpg)
M25P20-VMN6PB
Manufacturer Part Number
M25P20-VMN6PB
Description
Flash Mem Serial-SPI 3.3V 2M-Bit 256K x 8 8ns 8-Pin SO N Tray
Manufacturer
NUMONYX
Datasheet
1.M25P20-VMN6TP.pdf
(54 pages)
Specifications of M25P20-VMN6PB
Package
8SO N
Cell Type
NOR
Density
2 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
64KByte x 4
Timing Type
Synchronous
Operating Temperature
-40 to 85 °C
Interface Type
Serial-SPI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M25P20-VMN6PB
Manufacturer:
MITSUBISHI
Quantity:
100
6.2
18/55
Write Disable (WRDI)
The Write Disable (WRDI) instruction
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
Figure 8.
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction completion
Page Program (PP) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Write Disable (WRDI) Instruction Sequence
S
C
D
Q
(Figure
High Impedance
0
1
2
8) resets the Write Enable Latch (WEL) bit.
Instruction
3
4
5
6
7
AI03750D