MT48LC4M32LFF5-8 IT:G Micron Technology Inc, MT48LC4M32LFF5-8 IT:G Datasheet - Page 53

• Manufacturer Part Number: MT48LC4M32LFF5-8 IT:G
• Description: DRAM Chip Mobile SDRAM 128M-Bit 4Mx32 3.3V 90-Pin VFBGA Tray
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48LC4M32LFF5-8 IT:G

• Density: 128 Mb
• Maximum Clock Rate: 125 MHz
• Package: 90VFBGA
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Random Access Time: 19|8|7 ns
• Operating Temperature: -40 to 85 °C
• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 128M (4Mx32)
• Speed: 125MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 90-VFBGA
• Organization: 4Mx32
• Address Bus: 14b
• Access Time (max): 19/8/7ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 115mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 17:
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
Ac Characteristics
Parameter
Access time from CLK (positive
edge)
Address hold time
Address setup time
CLK high-level width
CLK low-level width
Clock cycle time
CKE hold time
CKE setup time
CS#, RAS#, CAS#, WE#, DQM hold time
CS#, RAS#, CAS#, WE#, DQM setup time
Data-in hold time
Data-in setup time
Data-out High-Z time
Data-out Low-Z time
Data-out hold time (load)
Data-out hold time (no load)
ACTIVE-to-PRECHARGE command
ACTIVE-to-ACTIVE command period
ACTIVE-to-READ or WRITE delay
Refresh period (4,096 rows)
Refresh period – (AT) (4,096 rows)
AUTO REFRESH command period
PRECHARGE command period
ACTIVE bank a to ACTIVE bank b command
Transition time
WRITE recovery time
Auto precharge mode (a)
Manual precharge mode (m)
Exit SELF REFRESH to ACTIVE command
Electrical Characteristics and Recommended AC Operating Conditions
Notes 5, 6, 7, 8, 9, 11 apply to entire table; notes appear on page 57
CL = 3
CL = 2
CL = 1
CL = 3
CL = 2
CL = 1
CL = 3
CL = 2
CL = 1
Symbol
t
t
t
t
t
WR (m)
t
t
t
t
t
t
t
WR (a)
AC (3)
AC (2)
AC (1)
t
CK (3)
CK (2)
CK (1)
t
HZ (3)
HZ (2)
HZ (1)
t
t
t
REF
t
t
t
t
t
t
CMH
t
CMS
t
t
OH
t
CKH
RCD
RRD
t
CKS
t
RAS
t
t
XSR
t
t
REF
RFC
AH
DH
OH
CH
AS
DS
RC
RP
t
CL
LZ
T
AT
N
+7.5ns
1 CLK
Min
n/a
0.8
1.5
2.5
7.5
9.6
2.5
0.8
1.5
0.8
1.5
2.5
1.8
0.3
44
66
19
66
19
15
67
3
1
1
2
–
–
–
–
–
–
–
–
-75M
53
120,000
Max
5.4
5.4
1.2
na
na
64
16
6
6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1 CLK
+7ns
Min
2.5
9.6
2.5
2.5
2.5
2.5
1.8
0.5
20
48
80
20
80
20
15
80
1
3
3
8
1
1
1
1
2
–
–
–
–
–
–
–
–
128Mb: x16, x32 Mobile SDRAM
-8
120,000
Max
1.2
19
19
64
16
7
7
8
–
–
–
–
–
–
–
–
–
–
–
–
–
8
–
–
–
–
–
–
–
–
–
–
–
Electrical Specifications
1 CLK
+5ns
Min
100
100
100
2.5
2.5
2.5
2.5
2.5
1.8
0.5
10
12
25
50
20
20
15
–
–
–
1
3
3
1
1
1
–
–
–
1
–
–
2
©2001 Micron Technology, Inc. All rights reserved.
-10
120,000
Max
1.2
22
22
64
16
7
8
–
–
–
–
–
–
–
–
–
–
–
–
–
7
8
–
–
–
–
–
–
–
–
–
–
–
Units
t
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CK
–
Notes
23
23
23
10
10
10
27
24
25
20
7