MT48LC2M32B2P-7:G Micron Technology Inc, MT48LC2M32B2P-7:G Datasheet - Page 6

• Manufacturer Part Number: MT48LC2M32B2P-7:G
• Description: DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II Tray
• Manufacturer: Micron Technology Inc
• Type: SDRAMr
• Series: -r

Specifications of MT48LC2M32B2P-7:G

• Density: 64 Mb
• Maximum Clock Rate: 143 MHz
• Package: 86TSOP-II
• Address Bus Width: 13 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Random Access Time: 17|8|5.5 ns
• Operating Temperature: 0 to 70 °C
• Organization: 2Mx32
• Address Bus: 13b
• Access Time (max): 17/8/5.5ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 160mA
• Pin Count: 86
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 64M (2Mx32)
• Speed: 143MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 86-TFSOP (0.400", 10.16mm Width)
• Lead Free Status / Rohs Status: Compliant

Functional Block Diagram
Figure 1:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
BA0, BA1
A0–A10,
RAS#
CAS#
WE#
CKE
CLK
CS#
13
2 Meg x 32 SDRAM
ADDRESS
REGISTER
MODE REGISTER
CONTROL
LOGIC
11
COUNTER
REFRESH
11
8
2
11
ADDRESS
2
ROW-
MUX
COUNTER/
CONTROL
COLUMN-
ADDRESS
LATCH
LOGIC
11
BANK
DECODER
ADDRESS
BANK 0
LATCH
ROW-
&
8
6
2048
READ DATA LATCH
SENSE AMPLIFIERS
DQM MASK LOGIC
BANK 0
(2,048 x 256 x 32)
WRITE DRIVERS
I/O GATING
DECODER
COLUMN
MEMORY
ARRAY
BANK0
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(x32)
8192
256
BANK 1
BANK 2
BANK 3
Functional Block Diagram
32
32
4
REGISTER
REGISTER
OUTPUT
©2001 Micron Technology, Inc. All rights reserved.
DATA
DATA
INPUT
64Mb: x32 SDRAM
4
32
DQM0–
DQM3
DQ31
DQ0–