74LVC126APW-T NXP Semiconductors, 74LVC126APW-T Datasheet - Page 3

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74LVC126APW-T

Manufacturer Part Number
74LVC126APW-T
Description
Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC126APW-T

Package
14TSSOP
Logic Family
LVC
Logic Function
Buffer/Line Driver
Number Of Outputs Per Chip
4
Output Type
3-State
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
2.7(Typ)@2.7V|2.4(Typ)@3.3V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting
Philips Semiconductors
Table 2:
6. Functional description
Table 3:
[1]
74LVC126A_6
Product data sheet
Symbol
1OE
1A
1Y
2OE
2A
2Y
GND
3Y
3A
3OE
4Y
4A
4OE
V
Inputs
nOE
H
H
L
CC
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state.
Pin description
Functional table
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
5.2 Pin description
Description
data enable input (active HIGH)
data input
data output
data enable input (active HIGH)
data input
data output
ground (0 V)
data output
data input
data enable input (active HIGH)
data output
data input
data enable input (active HIGH)
supply voltage
nA
L
H
X
[1]
Rev. 06.00 — 16 May 2006
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
Outputs
nY
L
H
Z
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
74LVC126A
3 of 16

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