74LVC126APW-T NXP Semiconductors, 74LVC126APW-T Datasheet - Page 10

• Manufacturer Part Number: 74LVC126APW-T
• Description: Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R
• Manufacturer: NXP Semiconductors

Specifications of 74LVC126APW-T

• Package: 14TSSOP
• Logic Family: LVC
• Logic Function: Buffer/Line Driver
• Number Of Outputs Per Chip: 4
• Output Type: 3-State
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 2.7(Typ)@2.7V|2.4(Typ)@3.3V ns
• Tolerant I/os: 5 V
• Typical Quiescent Current: 0.1 uA
• Polarity: Non-Inverting

Philips Semiconductors
12. Package outline
Fig 9. Package outline SOT108-1 (SO14)
74LVC126A_6
Product data sheet
SO14: plastic small outline package; 14 leads; body width 3.9 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
inches
UNIT
mm
VERSION
OUTLINE
SOT108-1
0.069
max.
1.75
A
0.010
0.004
0.25
0.10
A
14
1
1
Z
pin 1 index
y
0.057
0.049
1.45
1.25
A
2
076E06
IEC
0.25
0.01
e
A
3
0.019
0.014
0.49
0.36
b
p
D
0.0100
0.0075
0.25
0.19
MS-012
JEDEC
c
REFERENCES
8.75
8.55
0.35
0.34
D
Rev. 06.00 — 16 May 2006
(1)
0
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state
0.16
0.15
E
4.0
3.8
b
(1)
p
8
7
JEITA
scale
1.27
0.05
2.5
e
w
M
c
0.244
0.228
H
6.2
5.8
E
A
2
0.041
5 mm
1.05
A
L
1
0.039
0.016
1.0
0.4
L
p
H
E
E
0.028
0.024
detail X
0.7
0.6
Q
L
PROJECTION
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
L
EUROPEAN
0.25
0.01
p
Q
v
(A )
3
0.25
0.01
A
74LVC126A
w
θ
0.004
A
0.1
X
v
y
M
ISSUE DATE
99-12-27
03-02-19
0.028
0.012
A
Z
0.7
0.3
(1)
SOT108-1
θ
8
0
o
o
10 of 16