S19233PBIFB AMCC, S19233PBIFB Datasheet - Page 2
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S19233PBIFB
Manufacturer Part Number
S19233PBIFB
Description
Ethernet/Fibre Channel 49-Pin BGA
Manufacturer
AMCC
Datasheet
1.S19233PBIFB.pdf
(39 pages)
Specifications of S19233PBIFB
Package
49BGA
Maximum Data Rate
11.32 Gbps
Transmission Media Type
Wire
Power Supply Type
Analog
Typical Supply Current
380 mA
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.65|3.03 V
Maximum Operating Supply Voltage
1.95|3.56 V
S19233 – 10 G Ethernet/Fibre Channel/SONET/SDH
Dual CDR
FEATURES .............................................................................................................................................................. 1
APPLICATIONS ...................................................................................................................................................... 1
GENERAL DESCRIPTION ...................................................................................................................................... 1
TABLE OF CONTENTS .......................................................................................................................................... 2
LIST OF FIGURES .................................................................................................................................................. 4
LIST OF TABLES .................................................................................................................................................... 5
S19233 OVERVIEW ................................................................................................................................................ 6
POWER UP SEQUENCE ........................................................................................................................................ 6
RECEIVE OPTICAL SIDE – DESCRIPTION ........................................................................................................... 8
RECEIVE OPTICAL SIDE – CONTROL DESCRIPTION ........................................................................................ 9
TRANSMIT ELECTRICAL SIDE – DESCRIPTION ............................................................................................... 10
TRANSMIT ELECTRICAL SIDE – CONTROL DESCRIPTION ............................................................................ 11
SONET AND ETHERNET JITTER CRITERIA ...................................................................................................... 14
2
Analog Front End ............................................................................................................................................... 8
Clock Data Recovery ......................................................................................................................................... 8
Receive Signal Lock Detect ............................................................................................................................... 8
Receiver Output Polarity Invert .......................................................................................................................... 9
Receiver Output Squelch ................................................................................................................................... 9
Receive Serial Data In (RXDATINP/N) – External Pin ...................................................................................... 9
RXDATIP/N Internal Center-Tapped Termination (RXCTAP) – External Pin .................................................... 9
Receive Loop Filter (RXCAP1, RXCAP2) – External Pin .................................................................................. 9
Receive Lock (RXLOCK) – External Pin ........................................................................................................... 9
Receive Loss of Signal/Signal Detect (LOS_SD) – External Shared Pin .......................................................... 9
Receive Lock-to-Reference (LCKREFRXB) – I2C Register ............................................................................ 10
Receive Signal Detect Polarity (SDPOL) – I
Receive Squelch Serial Output (RX_SQ_EN) – I
Programmable Equalization ............................................................................................................................ 10
Signal Conditioning Operation ......................................................................................................................... 10
Clock Data Recovery – Transmit ..................................................................................................................... 10
Transmit Output Polarity Invert ........................................................................................................................ 11
Transmit Output Squelch ................................................................................................................................. 11
Transmit Serial Data In (TXDATIP/N) – External Pin ...................................................................................... 11
Transmit Loop Filter (TXCAP1, TXCAP2) – External Pin ................................................................................ 11
Transmit Lock (TXLOCk) – External Pin ......................................................................................................... 11
Transmit Lock-to-Reference (LCKREFTXB) – I
Transmit Squelch Serial Output (TX_SQ_EN) – I
Reference Clock (REFCLKP/N) – External Pin ............................................................................................... 12
PD – External Pin ............................................................................................................................................ 12
Electrical Diagnostic Loopback Enable (XLEB) –
Optical Side Line Loopback Enable (OLEB) – I
I2C BUS
SONET Jitter Transfer ..................................................................................................................................... 14
SONET Jitter Tolerance .................................................................................................................................. 14
I
2
C Register ............................................................................................................................................... 12
®
and Address Register ..................................................................................................................... 13
TABLE OF CONTENTS
2
C Register ................................................................................. 10
2
2
C Register ............................................................................ 12
C Register ............................................................................ 11
2
2
C Register ......................................................................... 10
C Register ......................................................................... 11
Revision 5.00 – March 16, 2007
AMCC Confidential and Proprietary
Data Sheet