92HD89B2X5NDGXZBX Integrated Device Technology (Idt), 92HD89B2X5NDGXZBX Datasheet - Page 62

• Manufacturer Part Number: 92HD89B2X5NDGXZBX
• Description: Audio Codec 2ADC / 2DAC 24-Bit 40-Pin VFQFPN Tray
• Manufacturer: Integrated Device Technology (Idt)
• Type: PCMr

Specifications of 92HD89B2X5NDGXZBX

• Package: 40VFQFPN
• Adc/dac Resolution: 24 Bit
• Number Of Channels: 2ADC /2 DAC
• Sampling Rate: 192 KSPS
• Number Of Adc Inputs: 10
• Number Of Dac Outputs: 11
• Number Of Dacs: 2
• Operating Supply Voltage: 1.5|3.3|5 V

92HD89B
Four channel HD Audio codec optimized for low power
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
Control3
Control2
Control1
Control0
Field Name
Rsvd
W4
W3
Reg
Get
Set
7.4.14. AFG (NID = 01h): GPIOWakeEn
Byte 4 (Bits 31:24)
Bits
Direction control for GPIO4: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output.
3
Direction control for GPIO3: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output.
2
Direction control for GPIO2: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output.
1
Direction control for GPIO1: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output.
0
Direction control for GPIO0: 0 = GPIO is configured as input; 1 = GPIO is con-
figured as output.
Bits
31:5
Reserved.
4
Wake enable for GPIO4: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
3
Byte 3 (Bits 23:16)
R/W
RW
RW
RW
RW
R/W
R
RW
RW
F1800h
Default
0h
0h
0h
0h
Default
00000000h
0h
0h
62
Byte 2 (Bits 15:8)
Reset
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
Reset
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
Byte 1 (Bits 7:0)
718h
V 1.0 11/10
92HD89B