92HD89B2X5NDGXZBX Integrated Device Technology (Idt), 92HD89B2X5NDGXZBX Datasheet - Page 61

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92HD89B2X5NDGXZBX

Manufacturer Part Number
92HD89B2X5NDGXZBX
Description
Audio Codec 2ADC / 2DAC 24-Bit 40-Pin VFQFPN Tray
Manufacturer
Integrated Device Technology (Idt)
Type
PCMr
Datasheet

Specifications of 92HD89B2X5NDGXZBX

Package
40VFQFPN
Adc/dac Resolution
24 Bit
Number Of Channels
2ADC /2 DAC
Sampling Rate
192 KSPS
Number Of Adc Inputs
10
Number Of Dac Outputs
11
Number Of Dacs
2
Operating Supply Voltage
1.5|3.3|5 V
92HD89B
Four channel HD Audio codec optimized for low power
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
Rsvd
Mask4
Mask3
Mask2
Mask1
Mask0
Field Name
Rsvd
Control4
Reg
Get
Set
7.4.13. AFG (NID = 01h): GPIODir
Byte 4 (Bits 31:24)
Bits
31:5
Reserved.
4
Enable for GPIO4: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
3
Enable for GPIO3: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
2
Enable for GPIO2: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
1
Enable for GPIO1: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
0
Enable for GPIO0: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control.
Bits
31:5
Reserved.
4
Byte 3 (Bits 23:16)
R/W
R
RW
RW
RW
RW
RW
R/W
R
RW
F1700h
Default
00000000h
0h
0h
0h
0h
0h
Default
00000000h
0h
61
Byte 2 (Bits 15:8)
Reset
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
Reset
N/A (Hard-coded)
POR - DAFG - ULR
Byte 1 (Bits 7:0)
717h
V 1.0 11/10
92HD89B

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