SI7465DP-T1-E3 Vishay, SI7465DP-T1-E3 Datasheet - Page 8

• Manufacturer Part Number: SI7465DP-T1-E3
• Description: MOSFET P-CH 60V 3.2A PPAK 8SOIC
• Manufacturer: Vishay
• Series: TrenchFET®r
• Type: Power MOSFETr

Specifications of SI7465DP-T1-E3

• Transistor Polarity: P-Channel
• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 64 mOhm @ 5A, 10V
• Drain To Source Voltage (vdss): 60V
• Current - Continuous Drain (id) @ 25° C: 3.2A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 40nC @ 10V
• Power - Max: 1.5W
• Mounting Type: Surface Mount
• Package / Case: PowerPAK® SO-8
• Minimum Operating Temperature: - 55 C
• Configuration: Single Quad Drain Triple Source
• Resistance Drain-source Rds (on): 0.064 Ohm @ 10 V
• Drain-source Breakdown Voltage: 60 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 3.2 A
• Power Dissipation: 1500 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Continuous Drain Current Id: -5A
• Drain Source Voltage Vds: -60V
• On Resistance Rds(on): 80mohm
• Rds(on) Test Voltage Vgs: 20V
• Threshold Voltage Vgs Typ: -3V
• Number Of Elements: 1
• Polarity: P
• Channel Mode: Enhancement
• Drain-source On-res: 0.064Ohm
• Drain-source On-volt: 60V
• Gate-source Voltage (max): ±20V
• Operating Temp Range: -55C to 150C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: PowerPAK SO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SI7465DP-T1-E3TR

AN821
Vishay Siliconix
PowerPAK SO-8 DUAL
The pin arrangement (drain, source, gate pins) and the
pin dimensions of the PowerPAK SO-8 dual are the
same as standard SO-8 dual devices. Therefore, the
PowerPAK device connection pads match directly to
those of the SO-8. As in the single-channel package,
the only exception is the extended drain connection
area. Manufacturers can likewise take immediate
advantage of the PowerPAK SO-8 dual devices by
mounting them to existing SO-8 dual land patterns.
To take the advantage of the dual PowerPAK SO-8’s
thermal performance, the minimum recommended
land pattern can be found in Application Note 826,
Recommended Minimum Pad Patterns With Outline
Drawing Access for Vishay Siliconix MOSFETs. Click
on the PowerPAK 1212-8 dual in the index of this doc-
ument.
The gap between the two drain pads is 24 mils. This
matches the spacing of the two drain pads on the Pow-
erPAK SO-8 dual package.
REFLOW SOLDERING
Vishay Siliconix surface-mount packages meet solder
reflow reliability requirements. Devices are subjected
to solder reflow as a test preconditioning and are then
reliability-tested using temperature cycle, bias humid-
ity, HAST, or pressure pot. The solder reflow tempera-
ture profile used, and the temperatures and time
duration, are shown in Figures 3 and 4.
www.vishay.com
2
3 °C(max)
140 - 170 °C
Figure 3. Solder Reflow Temperatures and Time Durations
Maximum peak temperature at 240 °C is allowed.
Pre-Heating Zone
60 s (min)
210 - 220 °C
3 °C(max)
For the lead (Pb)-free solder profile, see http://
www.vishay.com/doc?73257.
Ramp-Up Rate
Time at Maximum Temperature
Temperature at 155 ± 15 °C
Temperature Above 180 °C
Maximum Temperature
Ramp-Down Rate
Figure 3. Solder Reflow Temperature Profile
Reflow Zone
50 s (max)
10 s (max)
183 °C
4 ° C/s (max)
+ 6 °C /Second Maximum
120 Seconds Maximum
70 - 180 Seconds
240 + 5/- 0 °C
20 - 40 Seconds
+ 6 °C/Second Maximum
Document Number 71622
28-Feb-06