TMC2074-NE SMSC, TMC2074-NE Datasheet - Page 74
TMC2074-NE
Manufacturer Part Number
TMC2074-NE
Description
Network Controller & Processor ICs Standalone Mode CircLink Cntlr
Manufacturer
SMSC
Datasheet
1.TMC2074-NU.pdf
(116 pages)
Specifications of TMC2074-NE
Product
Controller Area Network (CAN)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 74 of 116
- Download datasheet (701Kb)
3.2.3
Revision 0.2 (10-23-08)
COMR2 Register: Page Register
*1: Not equivalent to the ARCNET original specifications. (Bit length variable)
- When reading/writing: ARCNET address pointer upper register (New)
RDDATA (bit 7)
This bit specifies the type of access to data register (COMR4) handled.
1: Read from data register
0: Write to data register
AUTOINC (bit 6)
This specifies an automatic increment mode of the RAMADR accessing data register (COMR4). The
incremental value is +1 for 8-bit bus width and 0 word mode (W16 = L, WDMD = 0), and +2 for 8-bit bus
width and 1 word mode (W16=L, WDMD=1) or 16-bit bus width (W16=1).
1: Automatically incremented
0: Not automatically incremented
nWRAPAR (bit 5)
This bit specifies internal operation mode when the most significant bit (MSB) of RAMADR is carried over.
1: Move to the top of the next page
0: Go back to the top of the current page
PAGE 4-0 (bits 4 to 0)
These bits specify the page numbers of the packet buffers. Rewriting these five bits is not valid before the
address in the page (COMR3) is written. Note that the upper limit of the specifiable value is restricted by
the page size, and unnecessary higher bits are deleted.
*1
*1
COMR2
[READ/WRITE]
15-8
4-0
bit
7
6
5
(Page Register)
name
--------
RDDATA
AUTOINC
nWRAPAR
PAGE4-0
DATASHEET
init. value
X
X
X
0
0
Page 74
description
reserved (all "0")
Read Data
Auto Increment
Wrap-around mode
Page 4-0
Dual Mode CircLink™ Controller
address:04h
SMSC TMC2074
Datasheet
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