TMC2074-NE SMSC, TMC2074-NE Datasheet - Page 29

• Manufacturer Part Number: TMC2074-NE
• Description: Network Controller & Processor ICs Standalone Mode CircLink Cntlr
• Manufacturer: SMSC

Specifications of TMC2074-NE

• Product: Controller Area Network (CAN)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Dual Mode CircLink™ Controller
Datasheet
2.5.1
SMSC TMC2074
RAM Access
The CPU accesses the packet buffer (RAM) through the COMR4 register. Prior to access, a read or write
and the page number need to be specified using the COMR2 register, as well as the address specification
in the page using the COMR3 register. The accessing method varies depending on the bit width of the data
bus, word mode, and swap mode.
(1) Data bus = 16 bits (W16 pin=H)
(2-a) Data bus = 8 bits , Word mode=OFF
(W16 pin=L, WDMD=0 in MODE REG.)
COMR2 Register : RDDATA AUTOINC nWRAPAR PAGE[4:0]
COMR3 Register : Address within a page RAMADR[7:0]
COMR4 Register : Packet Data RAMDT[7:0]
A/AD[5:0] = 04h (05h) *
A/AD[5:0] = 06h (07h) *
A/AD[5:0] = 08h or 09h
( )*:nSWAP=L
COMR2 Register : RDDATA, AUTOINC, nWRAPAR, PAGE[4;0]
COMR3 Register : Address Within a page RAMADR[7:0]
COM4 Register : Packet Data RAMDT[15:0]
A/AD[5:0] = 04h
A/AD[5:0] = 06h
A/AD[5:0] = 08h
DATASHEET
RD.
7
7
Page 29
A.I.
6
6
15 14 13 12 11 10 9 8 7 6
-
-
nW.A
5
5
-
-
-
-
4
4
4
-
-
3
3
3
-
-
2
2
2
-
-
-
-
1
1
1
-
- 7 6
0
0
0
Bit0 is fixed in 0 in the inside.
RD. A.I. nW.A
5
5
Revision 0.2 (10-23-08)
4 3 2 1 0
4 3 2 1 X
4 3 2 1 0