LX128EC-5F208I Lattice, LX128EC-5F208I Datasheet - Page 22
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LX128EC-5F208I
Manufacturer Part Number
LX128EC-5F208I
Description
Analog & Digital Crosspoint ICs E-Series, 128 I/O Switch Matrix, 1.8V, 5ns, IND
Manufacturer
Lattice
Datasheet
1.LX256EV-5FN484C.pdf
(75 pages)
Specifications of LX128EC-5F208I
Maximum Dual Supply Voltage
1.95 V
Minimum Dual Supply Voltage
1.65 V
Mounting Style
SMD/SMT
Number Of Arrays
1
Operating Supply Voltage
1.8 V
Supply Type
Triple
Configuration
128 x 128
Package / Case
FPBGA-208
Data Rate
21 Gbps
Input Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Output Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Product
Digital Crosspoint
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Lattice Semiconductor
Figure 15. Operation in SERDES Only Mode
Notes:
1. Some pins shared. See Logic Signal
Connections table for details.
2. For SERDES only mode programmable bit
holds FIFO in reset. Input registers used for
DOUT, and RECCLK configured as
latches and held in pass through.
GRP
Output
Output
Output
Latch
Latch
Latch
Latch
Latch
Latch
Input
Reg/
Reg/
Input
Reg/
Input
Reg/
Reg/
Reg/
GDX Block
Delay
1, 2
EMPTY
DOUT
RCLK
RE
FULL
FIFORSTb
FIFO
WCLK
19
WE
DIN
PT-CLK/CE(0:3)
GCLK/CE(0:3)
10
10
SYDT
Parallel
Parallel
RECCLK
RXD
Data
Data
TXD
POR
RESETb
SERDES
ispGDX2 Family Data Sheet
CDRRSTb
Serial
Data Out
(SOUT)
Serial
Data In
(SIN)
Pre-Assigned Pins
CAL
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