LAN89218AQ_samples SMSC, LAN89218AQ_samples Datasheet - Page 141
LAN89218AQ_samples
Manufacturer Part Number
LAN89218AQ_samples
Description
Ethernet ICs High Perform Chip 10/100 NonPCI Cntrl
Manufacturer
SMSC
Datasheet
1.LAN89218AQ.pdf
(155 pages)
Specifications of LAN89218AQ_samples
Ethernet Connection Type
10BASE-T, 100BASE-TX
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE802.3, IEEE802.3u
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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High Performance Single-Chip 10/100 Ethernet Controller for Automotive Applications
Datasheet
SMSC LAN89218
6.6
SYMBOL
t
A[7:1], END_SEL
cycle
t
t
t
t
t
t
csh
asu
dsu
csl
ah
dh
nCS, nWR
PIO writes are used for all LAN89218 write cycles. PIO writes can be performed using Chip Select
(nCS) or Write Enable (nWR). Either or both of these control signals must go high between cycles for
the period specified.
PIO Writes are valid for 16- and 32-bit access. Timing for 16-bit and 32-bit PIO write cycles are
identical with the exception that D[31:16] are ignored during a 16-bit write.
Note: The “Data Bus” width is 32 bits with optional support for 16-bit bus widths.
Note: A PIO Write cycle begins when both nCS and nWR are asserted. The cycle ends when either
PIO Writes
Data Bus
DESCRIPTION
Write Cycle Time
nCS, nWR Deassertion Time
Address, END_SEL Setup to nCS, nWR Assertion
Address, END_SEL Hold Time
Data Setup to nCS, nWR Deassertion
Data Hold Time
nCS, nWR Assertion Time
or both nCS and nWR are deasserted. They may be asserted and deasserted in any order.
t
Figure 6.5 PIO Write Cycle Timing
asu
Table 6.7 PIO Write Cycle Timing
DATASHEET
141
t
csl
t
t
cycle
dsu
MIN
45
32
13
0
0
7
0
t
dh
t
ah
TYP
t
csh
Revision 1.3 (02-23-10)
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
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