DS21354LB Maxim Integrated Products, DS21354LB Datasheet - Page 47

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DS21354LB

Manufacturer Part Number
DS21354LB
Description
Network Controller & Processor ICs E1 Single-Chip Trans ceiver (SCT) E1 Fram
Manufacturer
Maxim Integrated Products
Datasheet

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SR2: STATUS REGISTER 2 (Address = 07 Hex)
SYMBOL
(MSB)
RMF
RCMF
TSLIP
LOTC
RMF
TMF
RAF
SEC
TAF
POSITION
RAF
SR2.7
SR2.6
SR2.5
SR2.4
SR2.3
SR2.2
SR2.1
SR2.0
TMF
Receive CAS Multiframe. Set every 2ms (regardless if CAS signaling is
enabled or not) on receive multiframe boundaries. Used to alert the host
that signaling data is available.
Receive Align Frame. Set every 250ns at the beginning of align frames.
Used to alert the host that Si and Sa bits are available in the RAF and
RNAF registers.
Transmit Multiframe. Set every 2ms (regardless if CRC4 is enabled) on
transmit multiframe boundaries. Used to alert the host that signaling data
needs to be updated.
One Second Timer. Set on increments of one second based on RCLK. If
CCR2.7=1, then this bit will be set every 62.5ms instead of once a
second.
Transmit Align Frame. Set every 250ns at the beginning of align
frames. Used to alert the host that the TAF and TNAF registers need to
be updated.
Loss of Transmit Clock. Set when the TCLK pin has not transitioned
for one channel time (or 3. ns). Will force the LOTC pin high if enabled
via TCR2.0.
Receive CRC4 Multiframe. Set on CRC4 multiframe boundaries; will
continue to be set every 2ms on an arbitrary boundary if CRC4 is
disabled.
Transmit Elastic Store Slip. Set when the elastic store has either
repeated or deleted a frame of data.
SEC
47 of 124
NAME AND DESCRIPTION
TAF
LOTC
RCMF
TSLIP
(LSB)

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