DS26528G Maxim Integrated Products, DS26528G Datasheet - Page 230
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DS26528G
Manufacturer Part Number
DS26528G
Description
Network Controller & Processor ICs Octal E1-T1-J1 Singl e-Chip Transceiver (
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26528G.pdf
(276 pages)
Specifications of DS26528G
Product
Framer
Number Of Transceivers
8
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
875 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
TE-CSBGA
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS26528GA2
Manufacturer:
AFATECH
Quantity:
3 623
Part Number:
DS26528GA2
Manufacturer:
MAXIM/美信
Quantity:
20 000
Company:
Part Number:
DS26528GA5+
Manufacturer:
Maxim Integrated
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 5: Error Insert Bits 2 to 0 (EIB[2:0]). Will automatically insert bit errors at the prescribed rate into the
generated data pattern. Can be used for verifying error detection features. See
Table 9-23. BERT Error Insertion Rate
Bit 4: Single Bit Error Insert (SBE). A low-to-high transition will create a single bit error. Must be cleared and set
again for a subsequent bit error to be inserted.
Bits 3 to 0: Repetitive Pattern Length Select 3 to 0 (RPL[3:0]). RPL0 is the LSB and RPL3 is the MSB of a
nibble that describes how long the repetitive pattern is. The valid range is 17 (0000) to 32 (1111). These bits are
ignored if the receive BERT is programmed for a pseudorandom pattern. To create repetitive patterns fewer than
17 bits in length, the user must set the length to an integer number of the desired length that is less than or equal
to 32. For example, to create a 6-bit pattern, the user can set the length to 18 (0001) or to 24 (0111) or to 30
(1101). See
Table 9-24. BERT Repetitive Pattern Length Select
EIB2
0
0
0
0
1
1
1
1
LENGTH
(BITS)
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
EIB1
0
0
1
1
0
0
1
1
Table
EIB2
7
0
EIB0
0
1
0
1
0
1
0
1
RPL3
9-24.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
No errors automatically inserted
10E-1
10E-2
10E-3
10E-4
10E-5
10E-6
10E-7
BC2
BERT Control Register 2
1106h + (10h x n): where n = 0 to 7, for Ports 1 to 8
EIB1
ERROR RATE INSERTED
6
0
RPL2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
EIB0
5
0
RPL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
230 of 276
SBE
4
0
RPL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
RPL3
3
0
DS26528 Octal T1/E1/J1 Transceiver
Table
RPL2
2
0
9-23.
RPL1
1
0
RPL0
0
0
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