DS26528G Maxim Integrated Products, DS26528G Datasheet - Page 206
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
DS26528G
Manufacturer Part Number
DS26528G
Description
Network Controller & Processor ICs Octal E1-T1-J1 Singl e-Chip Transceiver (
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26528G.pdf
(276 pages)
Specifications of DS26528G
Product
Framer
Number Of Transceivers
8
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
875 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
TE-CSBGA
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Price
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AFATECH
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Transmit Channel Bit 8 Suppress (BPBSE8). MSB of the channel. Set to one to stop this bit from being
used.
Bit 6: Transmit Channel Bit 7 Suppress (BPBSE7). Set to one to stop this bit from being used.
Bit 5: Transmit Channel Bit 6 Suppress (BPBSE6). Set to one to stop this bit from being used.
Bit 4: Transmit Channel Bit 5 Suppress (BPBSE5). Set to one to stop this bit from being used.
Bit 3: Transmit Channel Bit 4 Suppress (BPBSE4). Set to one to stop this bit from being used.
Bit 2: Transmit Channel Bit 3 Suppress (BPBSE3). Set to one to stop this bit from being used.
Bit 1: Transmit Channel Bit 2 Suppress (BPBSE2). Set to one to stop this bit from being used.
Bit 0: Transmit Channel Bit 1 Suppress (BPBSE1). LSB of the channel. Set to one to stop this bit from being
used.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: CRC-4 Enable (CRC4) (E1 Mode Only).
Bit 2: Transmit Synchronizer Enable (TSEN).
Bit 1: Sync Enable (SYNCE).
Bit 0: Resynchronize (RESYNC). When toggled from low to high, a resynchronization of the transmit-side framer
is initiated. Must be cleared and set again for a subsequent resync.
0 = Do not search for the CRC-4 multiframe word
1 = Search for the CRC-4 multiframe word
0 = Transmit synchronizer disabled
1 = Transmit synchronizer enabled
0 = auto resync enabled
1 = auto resync disabled
BPBSE8
7
0
—
—
7
0
BPBSE7
TBPBS
Transmit BERT Port Bit Suppress Register
18Bh + (200h x n): where n = 0 to 7, for Ports 1 to 8
TSYNCC
Transmit Synchronizer Control Register
18Eh + (200h x n): where n = 0 to 7, for Ports 1 to 8
6
0
—
—
6
0
BPBSE6
5
0
—
—
5
0
BPBSE5
206 of 276
4
0
—
—
4
0
BPBSE4
CRC4
3
0
—
3
0
BPBSE3
DS26528 Octal T1/E1/J1 Transceiver
TSEN
TSEN
2
0
2
0
BPBSE2
SYNCE
SYNCE
1
0
1
0
RESYNC
RESYNC
BPBSE1
0
0
0
0
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