CS8900A-CQZR Cirrus Logic Inc, CS8900A-CQZR Datasheet - Page 95

• Manufacturer Part Number: CS8900A-CQZR
• Description: Ethernet ICs IC 10Mbps Ethernet Controller 5V
• Manufacturer: Cirrus Logic Inc

Specifications of CS8900A-CQZR

• Ethernet Connection Type: 10Base- 2, 10Base- 5, 10Base- F, 10Base- T
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3
• Data Rate: 10 Mbps
• Maximum Operating Temperature: + 70 C
• Package / Case: LQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS271F5
ered as normal. If there isn't, the CS8900A's
MAC engine compares the frame's Destina-
tion Address (DA) to the criteria programmed
into the DA filter. If the incoming DA fails the
DA filter, the frame is discarded. If the DA
passes the DA filter, the CS8900A automati-
cally switches to DMA mode and starts trans-
ferring the frame(s) currently being held in the
on-chip buffer into host memory. This frees up
buffer space for the incoming frame.
Figure 26 shows the steps the CS8900A goes
through in determining when to automatically
switch to DMA.
Whenever the CS8900A automatically enters
DMA, at least one complete frame is already
stored in the on-chip buffer. Because frames
are transferred to the host in the same order as
received (first in, first out), the beginning of the
received frame that triggered the switch to
DMA is not the first frame to be transferred. In-
stead, the oldest noncommitted frame in the
on-chip buffer is the first frame to use DMA.
When DMA begins, any pending RxEvent re-
ports in the Interrupt Status Queue are dis-
carded because the host cannot process
those events until the corresponding frames
have been completely DMAed.
Auto-Switch DMA works only on entire re-
ceived frames. The CS8900A does not use
Auto-Switch DMA to transfer partial frames.
Also, when a frame has been committed (see
Section 5.2.5 on page 85), the CS8900A will
not switch to DMA mode until the committed
frame has been transferred completely or
skipped.
After a complete frame has been moved to
host memory, the CS8900A updates the DMA
Start-of-Frame register (PacketPage base +
0126h), the DMA Frame Count register (Pack-
etPage base + 0128h), and the DMA Byte
Count register, then sets the RxDMAFrame bit
CS8900A
Crystal LAN™ Ethernet Controller
CIRRUS LOGIC PRODUCT DATASHEET
(Register C, BufEvent, bit 7). If RxDMAiE
(Register B, BufCFG, bit 7) is set, a corre-
sponding interrupt occurs.
5.4.4 DMA Channel Speed vs. Missed
Frames
When the CS8900A starts DMA, the entire old-
est, noncommitted frame must be placed in
host memory before on-chip buffer space will
be freed for the next incoming frame. If the old-
est frame is relatively large, and the next in-
Figure 26. Conditions for Switching to DMA
Auto-Switch to DMA
Packet Received
Buffer Space
RxDMA only
AutoRxDMA
Passed the
Available?
DA filter?
Frame
Bit=1?
More
Bit=1
Yes
No
No
Yes
No
Yes
Yes
No
in On-chip RAM
Frame Buffered
DMA Disabled
Auto-Switch
Discarded
All Frames
use DMA
Frame
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