CY28442ZXC-2 Silicon Laboratories Inc, CY28442ZXC-2 Datasheet - Page 12
CY28442ZXC-2
Manufacturer Part Number
CY28442ZXC-2
Description
Clock Generators & Support Products Calistoga
Manufacturer
Silicon Laboratories Inc
Datasheet
1.CY28442ZXC-2.pdf
(19 pages)
Specifications of CY28442ZXC-2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY28442ZXC-2
Manufacturer:
CYP
Quantity:
20 000
Company:
Part Number:
CY28442ZXC-2T
Manufacturer:
TI
Quantity:
11
CY28442-2
CPU_STP# Deassertion
The deassertion of the CPU_STP# signal will cause all CPU
outputs that were stopped to resume normal operation in a
synchronous manner. Synchronous manner meaning that no
short or stretched clock pulses will be produce when the clock
resumes. The maximum latency from the deassertion to active
outputs is no more than two CPU clock cycles.
CPU_STP#
CPUT
CPUC
CPUT Internal
CPUC Internal
Tdrive_CPU_STP#,10nS>200mV
Figure 7. CPU_STP# Deassertion Waveform
1.8mS
CPU_STOP#
PD
CPUT(Free Running
CPUC(Free Running
CPUT(Stoppable)
CPUC(Stoppable)
DOT96T
DOT96C
Figure 8. CPU_STP#= Driven, CPU_PD = Driven, DOT_PD = Driven
1.8mS
CPU_STOP#
PD
CPUT(Free Running)
CPUC(Free Running)
CPUT(Stoppable)
CPUC(Stoppable)
DOT96T
DOT96C
Figure 9. CPU_STP# = Tri-state, CPU_PD = Tri-state, DOT_PD = Tri-state
Rev 1.0, November 21, 2006
Page 12 of 19