CY28409OC Silicon Laboratories Inc, CY28409OC Datasheet - Page 7

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CY28409OC

Manufacturer Part Number
CY28409OC
Description
Clock Synthesizer / Jitter Cleaner SysClk Intel Grntsdl 865 and 875 chipsets
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of CY28409OC

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Rev 1.0, November 22, 2006
Byte 6: Control Register 6
Byte 7: Vendor ID
Table 6. Crystal Recommendations
Crystal Recommendations
The CY28409 requires a Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28409 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading.
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
the crystal will see must be considered to calculate the appro-
priate capacitive loading (CL).
7
6
5
4
3
2
1
0
14.31818 MHz
Frequency
Bit
Bit
3
2
1
7
6
5
4
0
(Fund)
@Pup
@Pup
0
1
0
0
1
0
0
0
0
0
0
0
0
0
1
1
Cut
AT
Revision ID Bit 3
Revision ID Bit 2
Revision ID Bit 1
Revision ID Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Reserved
Reserved
CPUC0, CPUT0
CPUC1, CPUT1
CPUC2, CPUT2
SRCT, SRCC
Reserved
PCIF
PCI
3V66
SRCT,SRCC
CPUT_ITP,CPUC_ITP
REF_1
REF_0
Loading Load Cap
Parallel
Name
Name
20 pF
0.1 mW
Revision ID Bit 3
Revision ID Bit 2
Revision ID Bit 1
Revision ID Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
(max.)
Drive
Reserved, Set = 0
Reserved, Set = 0
FS_A & FS_B Operation
0 = Normal, 1 = Test mode
SRC Frequency Select
0 = 100 MHz, 1 = 200 MHz
Reserved, Set = 0
Spread Spectrum Enable
0 = Spread Off, 1 = Spread On
REF_1 Output Enable
0 = Disabled, 1 = Enabled
REF_0 Output Enable
0 = Disabled, 1 = Enabled
Shunt Cap
(max.)
Figure 1 shows a typical crystal configuration using the two
trim capacitors. An important clarification for the following
discussion is that the trim capacitors are in series with the
crystal not parallel. It’s a common misconception that load
capacitors are in parallel with the crystal and should be
approximately equal to the load capacitance of the crystal.
This is not true.
5 pF
Figure 1. Crystal Capacitive Clarification
Motional
0.016 pF
(max.)
Description
Description
Tolerance
50 ppm
(max.)
Stability
50 ppm
(max.)
CY28409
Page 7 of 16
(max.)
Aging
5 ppm

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