LTC3780EG Linear Technology, LTC3780EG Datasheet - Page 9

• Manufacturer Part Number: LTC3780EG
• Description: IC,SMPS CONTROLLER,CURRENT-MODE,CMOS,SSOP,24PIN,PLASTIC
• Manufacturer: Linear Technology

PI FU CTIO S
V
pin connects the error amplifier input to an external resis-
tor divider from V
SGND (Pin 7/Pin 5): Signal Ground. All small-signal com-
ponents and compensation components should connect to
this ground, which should be connected to PGND at a single
point.
RUN (Pin 8/Pin 6): Run Control Input. Forcing the RUN pin
below 1.5V causes the IC to shut down the switching regu-
lator circuitry. There is a 100k resistor between the RUN pin
and SGND in the IC. Do not apply >6V to this pin.
FCB (Pin 9/Pin 7): Forced Continuous Control Input. The
voltage applied to this pin sets the operating mode of the
controller. When the applied voltage is less than 0.8V, the
forced continuous current mode is active. When this pin
is allowed to float, the burst mode is active in boost
operation and the skip cycle mode is active in buck
operation. When the pin is tied to INTV
frequency discontinuous current mode is active in buck or
boost operation.
PLLFLTR (Pin 10/Pin 8): The Phase-Locked Loop’s Low-
pass Filter is Tied to This Pin. Alternatively, this pin can be
driven with an AC or DC voltage source to vary the frequency
of the internal oscillator.
PLLIN (Pin 11/Pin 10): External Synchronization Input to
Phase Detector. This pin is internally terminated to SGND
with 50kΩ. The phase-locked loop will force the rising
bottom gate signal of the controller to be synchronized with
the rising edge of the PLLIN signal.
STBYMD (Pin 12/Pin 11): LDO Control Pin. Determines
whether the internal LDO remains active when the control-
ler is shut down. See Operation section for details. If the
STBYMD pin is pulled to ground, the SS pin is internally
pulled to ground, preventing start-up and thereby provid-
ing a single control pin for turning off the controller.
Decouple this pin with 0.1µF if not tied to a DC potential.
OSENSE
U
(Pin 6/Pin 4): Error Amplifier Feedback Input. This
U
OUT
U
.
(SSOP/QFN)
CC
, the constant
BOOST2, BOOST1 (Pins 13, 24/Pins 14, 27): Boosted
Floating Driver Supply. The (+) terminal of the bootstrap ca-
pacitor C
pin swings from a diode voltage below INTV
INTV
INTV
TG2, TG1 (Pins 14, 23/Pins 15, 26): Top Gate Drive. Drives
the top N-channel MOSFET with a voltage swing equal to
INTV
SW2, SW1 (Pins 15, 22/Pins 17, 24): Switch Node. The
(–) terminal of the bootstrap capacitor C
connects here. The SW2 pin swings from a Schottky diode
(external) voltage drop below ground up to V
pin swings from a Schottky diode (external) voltage drop
below ground up to V
BG2, BG1 (Pins 16, 18/Pins 18, 20): Bottom Gate Drive.
Drives the gate of the bottom N-channel MOSFET between
ground and INTV
PGND (Pin 17/Pin 19): Power Ground. Connect this pin
closely to the source of the bottom N-channel MOSFET, the
(–) terminal of CV
INTV
driver and control circuits are powered from this voltage.
Decouple this pin to ground with a minimum of 4.7µF low
ESR tantalum or ceramic capacitor.
EXTV
exceeds 5.7V, an internal switch connects this pin to INTV
and shuts down the internal regulator so that the controller
and gate drive power is drawn from EXTV
7V at this pin and ensure that EXTV
V
to SGND with an RC filter (1Ω, 0.1µF).
Exposed Pad (Pin 33, QFN Only): This pin is SGND and
must be soldered to PCB ground.
IN
(Pin 21/Pin 23): Main Input Supply. Decouple this pin
CC.
CC
CC
CC
CC
(Pin 19/Pin 21): Internal 6V Regulator Output. The
The BOOST1 pin swings from a diode voltage below
up to V
superimposed on the switch node voltage SW.
(Pin 20/Pin 22): External V
A
and C
OUT
B
CC
CC
(Figure 11) connects here. The BOOST2
+ INTV
.
and the (–) terminal of C
OUT
.
CC
.
CC
CC
Input. When EXTV
A
< V
and C
CC
LTC3780
IN
. Do not exceed
IN
CC
.
B
IN
(Figure 11).
(Figure 11)
up to V
. The SW1
9
IN
3780f
CC
CC
+