LTC3780EG Linear Technology, LTC3780EG Datasheet - Page 16

• Manufacturer Part Number: LTC3780EG
• Description: IC,SMPS CONTROLLER,CURRENT-MODE,CMOS,SSOP,24PIN,PLASTIC
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
LTC3780
Figure 11 is a basic LTC3780 application circuit. External
component selection is driven by the load requirement,
and begins with the selection of R
value. Next, the power MOSFETs are selected. Finally, C
and C
operation up to an input voltage of 36V.
R
R
The current comparator threshold sets the peak of the
inductor current in Boost mode and the maximum induc-
tor valley current in Buck mode. In Boost mode, the
maximum average load current is:
where ∆I
mode, the maximum average load current is:
Figure 7 shows how the load current (I
varies with input and output voltage
16
SENSE
SENSE
I
I
OUT MAX BOOST
OUT MAX BUCK
OUT
(
(
Selection and Maximum Output Current
is chosen based on the required output current.
L
are selected. This circuit can be configured for
is peak-to-peak inductor ripple current. In Buck
160
150
140
120
100
130
110
,
,
0.1
Figure 7. Load Current vs V
)
)
=
U
=
130
R
R
SENSE
160
SENSE
V
mV
IN
U
/V
mV V
OUT
1
+
•
(V)
•
∆
V
2
OUT
I
L
IN
SENSE
W
IN
–
MAXLOAD
/V
3780 F07
∆
and the inductor
OUT
2
I
L
10
U
• R
SENSE
IN
)
Allowing a margin for variations in LTC3780 and external
component values yields:
Selection of Operation Frequency
The LTC3780 uses a constant frequency architecture and
has an internal voltage controlled oscillator. The switching
frequency is determined by the internal oscillator capaci-
tor. This internal capacitor is charged by a fixed current
plus an additional current that is proportional to the
voltage applied to the PLLFLTR pin. The frequency of this
oscillator can be varied over a 2-to-1 range. The PLLFLTR
pin can be grounded to lower the frequency to 200kHz or
tied to 2.4V to yield approximately 400kHz. When PLLIN is
left open, the PLLFLTR pin goes low, forcing the oscillator
to minimum frequency.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 8. As the operating frequency
is increased the gate charge losses will be higher, reducing
efficiency. The maximum switching frequency is approxi-
mately 400kHz.
R
SENSE
Figure 8. Frequency vs PLLFLTR Pin Voltage
450
400
350
300
250
200
100
150
50
=
0
0
2
•
I
OUT MAX BOOST
0.5
PLLFLTR PIN VOLTAGE (V)
(
1
2 160
,
•
1.5
)
mV V
•
V
OUT
2
•
3780 F08
IN
+ ∆
2.5
I
L BOOST
(
)
3780f