KSZ8842-PMBL AM Micrel Inc, KSZ8842-PMBL AM Datasheet - Page 58

• Manufacturer Part Number: KSZ8842-PMBL AM
• Description: 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-PMBL AM

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Industrial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1636 - BOARD EVALUATION KSZ8842-PMQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3348

Micrel, Inc.
Switch Global Control Register 7 (0x0412): SGCR7
This register contains the global control for the switch function.
Reserved (Offset 0x0414 - 0x046F)
MAC Address Register 1 (Offset 0x0470): MACAR1
This register contains the MAC address for the switch function. This MAC address is used to send the PAUSE frame.
MAC Address Register 2 (Offset 0x0472): MACAR2
This register contains the MAC address for the switch function. This MAC address is used to send the PAUSE frame.
MAC Address Register 3 (Offset 0x0474): MACAR3
This register contains the MAC address for the switch function. This MAC address is used to send the PAUSE frame.
Reserved (Offset 0x0476 - 0x047F)
This register is reserved.
October 2007
15 – 0
15 – 8
15 – 0
15 – 0
15 – 0
6 – 3
2 – 0
Bit
Bit
Bit
Bit
Bit
7
Default
0x0000
Default
Default
Default
0xA1FF
Default
0xFFFF
0x0010
0x0
0x7
0
0
R/W
R/W
R/W
R/W
R/W
RW
RW
RW
RW
RW
RW
RW
RO
Description
Unknown Default Port Enable
Send packets with unknown destination address to specified ports in bits
[2:0].
1 = enable to send unknown DA packet
For factory test only. Always write 0.
Unknown Packet Default Port(s)
Specify which ports to send packets with unknown destination addresses.
Feature is enabled by bit [7].
Bit 2: for the host port
Bit 1: for the port 2
Bit 0: for the port 1
Description
MACA[47:32]
Specify host MAC address 1. This value must be the same as MAC
Address Register High (0x0204): MARH.
Description
MACA[31:16]
Specify host MAC address 2. This value must be the same as MAC
Address Register Middle (0x0202): MARM.
Description
MACA[15:0]
Specify host MAC address 3. This value must be the same as MAC
Address Register Low (0x0200): MARL.
Description
Reserved
58
KSZ8842-PMQL/PMBL
M9999-100207-1.5