KSZ8842-PMBL AM Micrel Inc, KSZ8842-PMBL AM Datasheet - Page 37

• Manufacturer Part Number: KSZ8842-PMBL AM
• Description: 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-PMBL AM

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Industrial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1636 - BOARD EVALUATION KSZ8842-PMQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3348

Micrel, Inc.
The following table shows the RDES1 register bit fields.
The following table shows the RDES2 register bit fields.
The following table shows the RDES3 register bit fields.
Transmit Descriptors (TDES0-TDES3)
Transmit descriptors must be Word aligned. Each descriptor provides one frame buffer, one byte count field, and
control and status bits.
The following table shows the TDES0 register bit fields.
The following table shows the TDES1 register bit fields.
October 2007
31 – 26
24 – 11
10 – 0
31 – 0
31 – 0
30 – 0
Bit
Bit
Bit
Bit
Bit
25
31
31
30
29
Description
Reserved
RER Receive End of Ring
When set, indicates that the descriptor list reached its final descriptor. The KSZ8842-
PMQL/PMBL returns to the base address of the list, thus creating a descriptor ring.
Reserved
RBS Receive Buffer Size
Indicates the size, in bytes, of the receive data buffer. If the field is 0, the KSZ8842-
PMQL/PMBL ignores this buffer and moves to the next descriptor.
The buffer size must be a multiple of 4.
Description
Buffer Address
Indicates the physical memory address of the buffer.
The buffer address must be Word aligned.
Description
Next Descriptor Address
Indicates the physical memory address of the next descriptor in the descriptor ring.
The buffer address must be Word aligned.
Description
OWN Own Bit
When set, indicates that the descriptor is owned by the KSZ8842-PMQL/PMBL. When
cleared, indicates that the descriptor is owned by the host. The KSZ8842-PMQL/PMBL
clears this bit either when it completes the frame transmission or when the buffer allocated in
the descriptor is empty.
The ownership bit of the first descriptor of the frame should be set after all subsequent
descriptors belonging to the same frame have been set. This avoids a possible race
condition between the KSZ8842-PMQL/PMBL fetching a descriptor and the driver setting an
ownership bit.
Reserved
Description
IC Interrupt on Completion
When set, the KSZ8842-PMQL/PMBL sets transmit interrupt after the present frame has
been transmitted. It is valid only when last segment is set.
FS First Segment
When set, indicates that the buffer contains the first segment of a frame.
LS Last Segment
When set, indicates that the buffer contains the last segment of a frame.
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KSZ8842-PMQL/PMBL
M9999-100207-1.5