DSPIC33FJ128MC202-E/SP Microchip Technology, DSPIC33FJ128MC202-E/SP Datasheet - Page 395
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DSPIC33FJ128MC202-E/SP
Manufacturer Part Number
DSPIC33FJ128MC202-E/SP
Description
16-bit DSC, 128KB Flash,Motor,DMA,40 MIPS,nanoWatt 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128MC202-E/SP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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TABLE 31-54: PARALLEL MASTER PORT READ TIMING REQUIREMENTS
FIGURE 31-32:
© 2011 Microchip Technology Inc.
AC CHARACTERISTICS
PM1
PM2
PM3
PM5
PM6
PM7
Param
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
No.
System
Clock
PMA<13:8>
PMRD
PMWR
PMD<7:0>
PMCS1
PMALL/PMALH
PMALL/PMALH Pulse Width
Address Out Valid to PMALL/PMALH Invalid
(address setup time)
PMALL/PMALH Invalid to Address Out Invalid
(address hold time)
PMRD Pulse Width
PMRD or PMENB Active to Data In Valid (data
setup time)
PMRD or PMENB Inactive to Data In Invalid
(data hold time)
PARALLEL MASTER PORT WRITE TIMING DIAGRAM
Characteristic
P1
P2
Address <7:0>
P3
Address
P4
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
PM16
Min.
150
—
—
—
—
—
P1
0.75 T
0.25 T
0.5 T
0.5 T
PM12
Typ
P2
—
—
CY
CY
PM11
CY
CY
Data
Data
P3
-40°C ≤ T
-40°C ≤ T
Max.
—
—
—
—
—
5
PM13
P4
A
Units
A
≤ +125°C for Extended
ns
ns
ns
ns
ns
ns
≤ +85°C for Industrial
DS70291E-page 395
P1
Conditions
—
—
—
—
—
—
P2
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