CY7C1520V18-250BZC Cypress Semiconductor Corp, CY7C1520V18-250BZC Datasheet - Page 31

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CY7C1520V18-250BZC

Manufacturer Part Number
CY7C1520V18-250BZC
Description
SRAM (Static RAM)
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1520V18-250BZC

Format - Memory
RAM
Memory Type
SRAM - Synchronous, DDR II
Memory Size
72M (2M x 36)
Speed
250MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
165-TFBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1520V18-250BZC
Manufacturer:
CYPRESS
Quantity:
250
Part Number:
CY7C1520V18-250BZC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document History Page
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at
Products
PSoC
Clocks & Buffers
Wireless
Memories
Image Sensors
© Cypress Semiconductor Corporation, 2004-2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used
for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use
as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support
systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document Number: 38-05563 Rev. *E
DDR RAMs and QDR RAMs comprise a new family of products developed by Cypress, Hitachi, IDT, Micron, NEC, and Samsung. All product and company names mentioned in this document are the
trademarks of their respective holders.
Document Title: CY7C1516V18/CY7C1527V18/CY7C1518V18/CY7C1520V18, 72-Mbit DDR-II SRAM 2-Word Burst Architec-
ture
Document Number: 38-05563
*E
2511109
See ECN
cypress.com/sales.
wireless.cypress.com
memory.cypress.com
clocks.cypress.com
image.cypress.com
VKN/AESA
psoc.cypress.com
Updated Logic Block diagram
Updated Power-up sequence waveform and it’s description
Updated I
Added footnote #19 related to I
Changed DLL minimum operating frequency from 80MHz to 120MHz
Changed t
Modified footnotes 21 and 28
Changed Θ
Revised June 13, 2008
DD
CYC
JA
/I
PSoC Solutions
General
Low Power/Low Voltage
Precision Analog
LCD Drive
CAN 2.0b
USB
SB
spec from 16.2 to 16.3, Changed Θ
max spec to 8.4ns for all speed bins
specs
CY7C1516V18, CY7C1527V18
CY7C1518V18, CY7C1520V18
DD
psoc.cypress.com/precision-analog
psoc.cypress.com/low-power
psoc.cypress.com/solutions
psoc.cypress.com/lcd-drive
JC
psoc.cypress.com/can
psoc.cypress.com/usb
spec from 2.3 to 2.1
Page 31 of 31
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