CY7C1470BV33-167AXC Cypress Semiconductor Corp, CY7C1470BV33-167AXC Datasheet - Page 10

CY7C1470BV33-167AXC

CY7C1470BV33-167AXC

Manufacturer Part Number
CY7C1470BV33-167AXC
Description
CY7C1470BV33-167AXC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1470BV33-167AXC

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
72M (2M x 36)
Speed
167MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
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Part Number:
CY7C1470BV33-167AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
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Part Number:
CY7C1470BV33-167AXC
Manufacturer:
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Part Number:
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Quantity:
10 000
load the initial address, as described in
on page
clock rise, the Chip Enables (CE
are ignored and the burst counter is incremented. The correct
BW (BW
and BW
in each cycle of the burst write to write the correct bytes of data.
Sleep Mode
The ZZ input pin is an asynchronous input. Asserting ZZ places
the SRAM in a power conservation “sleep” mode. Two clock
cycles are required to enter into or exit from this “sleep” mode.
While in this mode, data integrity is guaranteed. Accesses
pending when entering the “sleep” mode are not considered valid
nor is the completion of the operation guaranteed. The device
must be deselected before entering the “sleep” mode. CE
and CE
ZZ input returns LOW.
ZZ Mode Electrical Characteristics
Document #: 001-15031 Rev. *G
I
t
t
t
t
DDZZ
ZZS
ZZREC
ZZI
RZZI
Parameter
3
a,b,c,d,e,f,g,h
, must remain inactive for the duration of t
a,b,c,d
9. When ADV/LD is driven HIGH on the subsequent
for CY7C1470BV33, BW
for CY7C1474BV33) inputs must be driven
Sleep mode standby current
Device operation to ZZ
ZZ recovery time
ZZ active to sleep current
ZZ Inactive to exit sleep current
1
, CE
Description
2
, and CE
“Single Write Accesses”
a,b
for CY7C1472V33,
3
) and WE inputs
ZZREC
after the
1
, CE
ZZ > V
ZZ > V
ZZ < 0.2V
This parameter is sampled
This parameter is sampled
2
,
Table 1. Interleaved Burst Address Table
(MODE = Floating or V
Table 2. Linear Burst Address Table (MODE = GND)
DD
DD
− 0.2V
− 0.2V
Address
Test Conditions
Address
A1,A0
A1,A0
First
First
00
01
10
11
00
01
10
11
CY7C1472BV33, CY7C1474BV33
Address
Address
Second
Second
A1,A0
A1,A0
01
00
10
11
DD
01
10
11
00
)
2t
Min
Address
Address
CYC
CY7C1470BV33
0
A1,A0
Third
A1,A0
Third
10
11
00
01
10
11
00
01
2t
2t
Max
120
CYC
CYC
Page 10 of 31
Address
Address
Fourth
Fourth
A1,A0
A1,A0
10
01
00
11
00
01
10
11
Unit
mA
ns
ns
ns
ns
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