CY7B991V-7JXCT Cypress Semiconductor Corp, CY7B991V-7JXCT Datasheet - Page 4
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CY7B991V-7JXCT
Manufacturer Part Number
CY7B991V-7JXCT
Description
IC,Eight Distributed-Output Clock Driver,LDCC,32PIN,PLASTIC
Manufacturer
Cypress Semiconductor Corp
Series
RoboClock™r
Type
Buffer/Driverr
Datasheet
1.CY7B991V-7JXC.pdf
(17 pages)
Specifications of CY7B991V-7JXCT
Number Of Circuits
1
Ratio - Input:output
8:8
Differential - Input:output
Yes/Yes
Input
3-State
Output
LVTTL
Frequency - Max
80MHz
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-PLCC
Frequency-max
80MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7B991V-7JXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7B991V-7JXCT
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Block Diagram Description
Phase Frequency Detector and Filter
The phase frequency detector and filter blocks accept inputs
from the reference frequency (REF) input and the feedback (FB)
input. They generate correction information to control the
frequency of the voltage controlled oscillator (VCO). These
blocks, along with the VCO, form a PLL that tracks the incoming
REF signal.
VCO and Time Unit Generator
The VCO accepts analog control inputs from the PLL filter block.
It generates a frequency that is used by the time unit generator
to create discrete time units, selected in the skew select matrix.
The operational range of the VCO is determined by the FS
control pin. The time unit (t
frequency of the device and the level of the FS pin as shown in
Table
Table 2. Frequency Range Select and t
Document Number: 38-07141 Rev. *G
Notes
FS
LOW
MID
HIGH
1. For all three state inputs, HIGH indicates a connection to V
2. The level to be set on FS is determined by the “normal” operating frequency (f
3. When the FS pin is selected HIGH, the REF input must not transition upon power up until V
[2, 3]
circuitry holds an unconnected input to V
(f
when the output connected to FB is undivided. The frequency of the REF and FB inputs is f
using a divided output as the FB input.
NOM
2.
) always appears at the outputs when they are operated in their undivided modes (see
f
Min
NOM
15
25
40
(MHz)
Max
30
50
80
t
U
where N =
=
U
----------------------- -
f
44
26
16
) is determined by the operating
NOM
1
×
N
CC
/2.
Frequency (MHz) At
Which t
U
Approximate
Calculation
22.7
38.5
62.5
U
CC
= 1.0 ns
, LOW indicates a connection to GND, and MID indicates an open connection. Internal termination
[1]
NOM
) of the V
Skew Select Matrix
The skew select matrix is comprised of four independent
sections. Each section has two low-skew, high fanout drivers
(xQ0, xQ1), and two corresponding three-level function select
(xF0, xF1) inputs.
functions for each section as determined by the function select
inputs. All times are measured with respect to the REF input
assuming that the output connected to the FB input has 0t
selected.
Table 3. Programmable Skew Configurations
LOW
LOW
LOW
MID
MID
MID
HIGH
HIGH
HIGH
1F1, 2F1,
3F1, 4F1
Function Selects
CO
NOM
CC
and Time Unit Generator (see
Table
/2 or f
has reached 2.8 V.
3). The frequency appearing at the REF and FB inputs is f
1F0, 2F0,
LOW
MID
HIGH
LOW
MID
HIGH
LOW
MID
HIGH
3F0, 4F0
NOM
/4 when the part is configured for a frequency multiplication
Table 3
1Q0, 1Q1,
2Q0, 2Q1
–4t
–3t
–2t
–1t
+1t
+2t
+3t
+4t
0t
shows the nine possible output
U
Logic Block
U
U
U
U
U
U
U
U
Output Functions
Divide by 2 Divide by 2
Divide by 4
3Q0, 3Q1
Diagram). Nominal frequency
–6t
–4t
–2t
+2t
+4t
+6t
0t
U
U
U
U
U
U
U
CY7B991V
[1]
4Q0, 4Q1
Page 4 of 17
Inverted
–6t
–4t
–2t
+2t
+4t
+6t
0t
U
U
U
U
U
U
U
NOM
U
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