CY7B991V-5JXIT Cypress Semiconductor Corp, CY7B991V-5JXIT Datasheet - Page 5
![IC,Eight Distributed-Output Clock Driver,LDCC,32PIN,PLASTIC](/photos/28/16/281698/32-plcc_sml.jpg)
CY7B991V-5JXIT
Manufacturer Part Number
CY7B991V-5JXIT
Description
IC,Eight Distributed-Output Clock Driver,LDCC,32PIN,PLASTIC
Manufacturer
Cypress Semiconductor Corp
Series
RoboClock™r
Type
Buffer/Driverr
Datasheet
1.CY7B991V-7JXC.pdf
(17 pages)
Specifications of CY7B991V-5JXIT
Number Of Circuits
1
Ratio - Input:output
8:8
Differential - Input:output
Yes/Yes
Input
3-State
Output
LVTTL
Frequency - Max
80MHz
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-PLCC
Frequency-max
80MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7B991V-5JXIT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7B991V-5JXIT
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Test Mode
The TEST input is a three-level input. In normal system operation, this pin is connected to ground, allowing the CY7B991V to operate
as explained in the
jumper to ground or be tied LOW through a 100-Ω resistor. This enables an external tester to change the state of these pins.
If the TEST input is forced to its MID or HIGH state, the device operates with its internal phase locked loop disconnected, and input
levels supplied to REF directly controls all outputs. Relative output to output functions are the same as in normal mode.
In contrast with normal operation (TEST tied LOW), all outputs function based only on the connection of their own function select
inputs (xF0 and xF1) and the waveform characteristics of the REF input.
Document Number: 38-07141 Rev. *G
Note
4. FB connected to an output selected for “zero” skew (that is, xF1 = xF0 = MID).
(N/A)
(N/A)
(N/A)
(N/A)
1Fx
2Fx
MM
MH
HM
HH
LM
LH
ML
HL
LL
“Block Diagram Description”
Figure 2. Typical Outputs with FB Connected to a Zero Skew Output Test Mode
LL/HH
(N/A)
(N/A)
(N/A)
(N/A)
3Fx
4Fx
MM
MH
HM
HH
LM
LH
ML
HL
REFInput
FBInput
DIVIDED
INVERT
– 6t
– 4t
– 3t
– 2t
– 1t
+1t
+2t
+3t
+4t
+6t
0t
U
U
U
U
U
U
U
U
U
U
U
on page 4. For testing purposes, any of the three-level inputs can have a removable
[4]
CY7B991V
Page 5 of 17
[+] Feedback