CY62157EV30LL-45BVI Cypress Semiconductor Corp, CY62157EV30LL-45BVI Datasheet - Page 4

CY62157EV30LL-45BVI

CY62157EV30LL-45BVI

Manufacturer Part Number
CY62157EV30LL-45BVI
Description
CY62157EV30LL-45BVI
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62157EV30LL-45BVI

Format - Memory
RAM
Memory Type
SRAM
Memory Size
8M (512K x 16)
Speed
45ns
Interface
Parallel
Voltage - Supply
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VFBGA
Density
8Mb
Access Time (max)
45ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
2.5/3.3V
Address Bus
19b
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
25mA
Operating Supply Voltage (min)
2.2V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Word Size
16b
Number Of Words
512K
Lead Free Status / RoHS Status
Contains lead / RoHS compliant by exemption
Lead Free Status / RoHS Status
Contains lead / RoHS compliant by exemption

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY62157EV30LL-45BVI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY62157EV30LL-45BVIT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. User guidelines are not tested.
Storage Temperature ................................ –65°C to + 150°C
Ambient Temperature with
Power Applied .......................................... –55°C to + 125°C
Supply Voltage to Ground
Potential ................................ –0.3V to 3.9V (V
DC Voltage Applied to Outputs
in High-Z State
DC Input Voltage
Electrical Characteristics
Over the Operating Range
Notes
Document #: 38-05445 Rev. *H
Parameter
V
V
V
V
I
I
I
I
I
5. V
6. V
7. Full device AC operation assumes a 100 s ramp time from 0 to V
8. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
9. Chip enables (CE
IX
OZ
CC
SB1
SB2
OH
OL
IH
IL
be left floating.
IL(min)
IH(max)
[9]
= –2.0V for pulse durations less than 20 ns.
= V
Output HIGH
voltage
Output LOW
voltage
Input HIGH
voltage
Input LOW
voltage
Input leakage
current
Output leakage
current
V
supply current
Automatic CE
power down
current — CMOS
inputs
Automatic CE
power down
current — CMOS
inputs
CC
CC
Description
+ 0.75V for pulse durations less than 20 ns.
[5, 6]
operating
1
[5, 6]
and CE
............... –0.3V to 3.9V (V
........... –0.3V to 3.9V (V
2
), byte enables (BHE and BLE) and BYTE (48 TSOP I only) need to be tied to CMOS levels to meet the I
I
I
I
I
V
V
V
V
GND < V
GND < V
f = f
f = 1 MHz
CE
V
f = f
V
CE
V
f = 0, V
OH
OH
OL
OL
f = 0 (OE, BHE, BLE and WE),
CC
CC
CC
CC
IN
CC
IN
1
1
= 0.1 mA
= 2.1mA, V
max
max
= –0.1 mA
= –1.0 mA, V
> V
> V
= 2.2V to 2.7V
= 2.7V to 3.6V
= 2.2V to 2.7V
= 2.7V to 3.6V
= 3.60V
> V
> V
CC
CC
CC
(Address and Data Only),
= 1/t
CC
CC
I
O
< V
Test Conditions
< V
– 0.2V, V
= 3.60V
– 0.2V or V
0.2V, CE
– 0.2V or CE
RC
CC
CC
CC
CC max
CCmax
CCmax
, Output Disabled
V
I
CMOS levels
CC
OUT
> 2.70V
CC
IN
> 2.70V
= V
2
< 0.2V)
IN
= 0 mA
+ 0.3V)
+ 0.3V)
+ 0.3V)
< 0.2V
cc
2
< 0.2V,
CCmax
(min) and 200 s wait time after V
< 0.2V,
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage .......................................... > 2001V
(MIL-STD-883, Method 3015)
Latch Up Current ................................................... > 200 mA
Operating Range
CY62157EV30LL
–0.3
–0.3
Min
2.0
2.4
1.8
2.2
–1
–1
45 ns (Ind’l/Auto-A)
Device
Typ
1.8
18
2
2
[8]
CC
stabilization.
V
V
CC
CC
Max
Industrial/
0.4
0.4
0.6
0.8
+1
+1
25
3
8
8
Range
Auto-A
Auto-E
+ 0.3
+ 0.3
CC
= V
CY62157EV30 MoBL
CC(typ)
–0.3
–0.3
Min
2.0
2.4
1.8
2.2
–4
–4
–40°C to +85°C
–40°C to +125°C
55 ns (Auto-E)
, T
Temperature
A
SB2
Ambient
Typ
= 25 °C.
1.8
18
/ I
2
2
CCDR
[8]
spec. Other inputs can
V
V
CC
CC
Max
0.4
0.4
0.6
0.8
+4
+4
35
30
30
4
+ 0.3
+ 0.3
Page 4 of 17
2.2V to
V
3.6V
CC
Unit
mA
A
A
A
A
[7]
V
V
V
V
V
V
V
V
®
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