CS5364-DQZR Cirrus Logic Inc, CS5364-DQZR Datasheet - Page 18
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CS5364-DQZR
Manufacturer Part Number
CS5364-DQZR
Description
IC,A/D CONVERTER,QUAD,24-BIT,QFP,48PIN
Manufacturer
Cirrus Logic Inc
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18
SWITCHING SPECIFICATIONS - CONTROL PORT - SPI TIMING
Inputs: Logic 0 = DGND, Logic 1 = VLC, CDOUT C
Notes:
CCLK Clock Frequency
RST Rising Edge to CS Falling
CS Falling to CCLK Edge
CS High Time Between Transmissions
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT Stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
1. Data must be held for sufficient time to bridge the transition time of CCLK.
2. For f
CDOUT
sck
CCLK
CDIN
RST
<1 MHz
CS
Parameter
t
srs
t
css
t
sch
t
pd
Figure 6. SPI Timing
(Note 1)
(Note 2)
(Note 2)
t
scl
L
t
dsu
= 30 pF
t
dh
Symbol
f
t
t
t
t
t
t
t
t
dsu
sck
css
csh
sch
t
t
t
t
srs
scl
dh
pd
r1
f1
r2
f2
t
f2
t
r2
Min
1.0
20
20
66
66
40
15
0
-
t
csh
Max
100
6.0
50
25
-
CS5364
DS625F2
Units
MHz
ns
μs
ns
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