CRD42L51 Cirrus Logic Inc, CRD42L51 Datasheet - Page 58

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CRD42L51

Manufacturer Part Number
CRD42L51
Description
Ref Bd Low-voltage Stereo Codec
Manufacturer
Cirrus Logic Inc
Datasheets
CS42L51
6.9
DAC Control (Address 09h)
7
6
5
4
3
2
1
0
DATA_SEL1
DATA_SEL0
FREEZE
Reserved
DEEMPH
AMUTE
DAC_SZC1
DAC_SZC0
DAC Data Selection (DATA_SEL[1:0])
Default: 00
00 - PCM Serial Port to DAC
01 - Signal Processing Engine to DAC
10 - ADC Serial Port to DAC
11 - Reserved
Function:
Selects the digital signal source for the DAC. Note: Certain functions are only available when the “Signal
Processing Engine to DAC” option is selected using these bits.
Freeze Controls (FREEZE)
Default: 0
Function:
This function will freeze the previous settings of, and allow modifications to be made to all control port reg-
isters without the changes taking effect until the FREEZE is disabled. To have multiple changes in the con-
trol port registers take effect simultaneously, enable the FREEZE bit, make all register changes, then
disable the FREEZE bit.
DAC De-Emphasis Control (DEEMPH)
Default: 0
0 - No De-Emphasis
1 - De-Emphasis Enabled
Function:
Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control.
Enables the digital filter to apply the standard 15µs/50µs digital de-emphasis filter response for a sample
rate of 44.1 kHz.
Analog Output Auto MUTE (AMUTE)
Default: 0
0 - Auto Mute Disabled
1 - Auto Mute Enabled
Function:
Enables (or disables) Automatic Mute of the analog outputs after 8192 “0” samples on each digital input
channel.
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DS679F1

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