AM29LV641DH120REF Spansion Inc., AM29LV641DH120REF Datasheet - Page 56

• Manufacturer Part Number: AM29LV641DH120REF
• Description: Flash Memory IC
• Manufacturer: Spansion Inc.

Specifications of AM29LV641DH120REF

• Memory Size: 64Mbit
• Memory Configuration: 4M X 16
• Ic Interface Type: Parallel
• Access Time: 120ns
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Termination Type: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Test Conditions
Test Conditions table: Redefined output timing mea-
surement reference level as 0.5 V
Added note to table and figure.
Erase and Program Operations table, Alternate
CE# Controlled Erase and Program Operations
table, Erase and Programming Performance table
Changed the typical sector erase time to 1.6 s.
AC Characteristics—Figure 15. Program
Operations Timing and Figure 17. Chip/Sector
Erase Operations
Deleted t
high.
Physical Dimensions
Replaced figures with more detailed illustrations.
Revision B+1 (August 4, 2000)
Global
Added trademarks for SecSi Sector.
Accelerated Program Operation (page 11), Unlock
Bypass Command Sequence (page 25)
Added caution note regarding ACC pin.
Absolute Maximum Ratings
Corrected the maximum voltage on V
DC Characteristics table
Added WP# = V
rents I
Revision B+2 (October 18, 2000)
Distinctive Characteristics
Corrected package options for 56-pin SSOP as being
available on Am29LV640DH/DL only.
Revision B+3 (January 18, 2001)
Global
Deleted “Preliminary” status from document.
General Description
In the second paragraph, corrected references to V
voltage ranges. The 90 and 120 speeds are available
where V
able where V
Revision B+4 (March 8, 2001)
Table 4, Sector Group Protection/Unprotection
Address Table
Corrected the sector group address bits for sectors
64–127.
54
CC3
IO
GHWL
, I
≥
CC4
V
IO
CC
, I
and changed OE# waveform to start at
< V
, and 100 and 120 ns speeds are avail-
CC5
IH
CC
to test conditions for standby cur-
.
.
IO
.
IO
to +5.5V.
Am29LV640D/Am29LV641D
D A T A
IO
S H E E T
Revision B+5 (October 11, 2001)
Connection Diagrams, Ordering Information,
Physical Dimensions
Added 64-ball Fortified BGA package information.
Revision B+6 (January 10, 2002)
Global
Clarified description of VersatileIO (V
ing sections: Distinctive Characteristics; General De-
scription; VersatileIO (V
DC Characteristics; CMOS compatible.
Reduced typical sector erase time from 1.6 s to 0.9 s.
DC Characteristics
Changed minimum V
leted reference to Note 6 for both V
Erase and Program Performance table
Reduced typical sector erase time from 1.6 s to 0.9 s.
Changed typical chip program time from 90 s to 115 s.
Revision B+7 (April 15, 2002)
Ordering Information
Added N designator for Fortified BGA package mark-
ings.
Common Flash Interface (CFI)
Revised data value at address 44h. Clarified descrip-
tion of data for addresses 45–47h, 49, 4A, 4D–4Fh.
Table 10, Command Definitions
Clarified and combined Notes 4 and 5 into Note 4.
Revision B+8 (September 20, 2002)
Sector Erase Command Sequence
Changed sentence arrangement in fourth paragraph.
Revision B+9 (March 3, 2004)
Table 10, Command Definitions
Revised SecSi Sector Factory Protect (note 8) com-
mand definitions.
Revision B+10 (April 5, 2004)
Command Definitions
Changed first Address data for Erase Suspend/Re-
sume from BA to XXX.
Revision C (June 4, 2004)
Ordering Information
Added Pb-free OPNs.
OH1
IO
) Control; Operating Ranges;
from 0.85V
22366C6 January 22, 2007
OH1
IO
IO
and V
) in the follow-
to 0.8V
OH2
IO
.
. De-