AM29LV320DT90EI AMD (ADVANCED MICRO DEVICES), AM29LV320DT90EI Datasheet - Page 31
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AM29LV320DT90EI
Manufacturer Part Number
AM29LV320DT90EI
Description
Flash Memory IC
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheets
1.AM29LV320DT90EI.pdf
(55 pages)
2.AM29LV320DT90EI.pdf
(55 pages)
3.AM29LV320DT90EI.pdf
(57 pages)
Specifications of AM29LV320DT90EI
Memory Configuration
4M X 8 / 2M X 16 Bit
Package/case
48-TSOP
Supply Voltage Max
3.6V
Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Access Time, Tacc
90nS
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output
pin which indicates whether an Embedded Al-
gorithm is in progress or complete. The RY/BY#
status is valid after the rising edge of the final
WE# pulse in the command sequence. Since
RY/ B Y# is an o p e n-d rai n o ut p ut , se ve ral
RY/BY# pins can be tied together in parallel
with a pull-up resistor to V
If the output is low (Busy), the device is ac-
tively erasing or programming. (This includes
programming in the Erase Suspend mode.) If
the output is high (Ready), the device is in the
r e a d m o d e , th e s ta n d b y m o d e , o r i n th e
e ra s e - s u s p e n d - r e a d m o d e .
page 33
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Em-
b ed d ed P r o gram or Era s e a lg or ith m i s in
progress or complete, or whether the device
entered the Erase Suspend mode. Toggle Bit I
may be read at any address, and is valid after
the rising edge of the final WE# pulse in the
command sequence (prior to the program or
erase operation), and during the sector erase
time-out.
During an Embedded Program or Erase algo-
rithm operation, successive read cycles to any
address cause DQ6 to toggle. The system may
use either OE# or CE# to control the read cy-
cles. When the operation is complete, DQ6
stops toggling.
After an erase command sequence is written, if
all sectors selected for erasing are protected,
DQ6 toggles for approximately 100 µs, then re-
turns to reading array data. If not all selected
sectors are protected, the Embedded Erase al-
gorithm erases the unprotected sectors, and ig-
nores the selected sectors that are protected.
The system can use DQ6 and DQ2 together to
determine whether a sector is actively erasing
or is erase-suspended. When the device is ac-
tively erasing (that is, the Embedded Erase al-
gorithm is in progress), DQ6 toggles. When the
device enters the Erase Suspend mode, DQ6
stops toggling. However, the system must also
use DQ2 to determine which sectors are eras-
ing or erase-suspended. Alternatively, the sys-
tem can use DQ7 (see the subsection on
Data# Polling” on page
If a program address falls within a protected
sector, DQ6 toggles for approximately 1 µs
after the program command sequence is writ-
ten, then returns to reading array data.
November 15, 2004
shows the outputs for RY/BY#.
30).
CC
.
Ta b l e 1 5 , o n
“DQ7:
Am29LV320D
D Q 6 a l s o t o g g l e s d u r i n g t h e e ra s e - s u s -
pend-program mode, and stops toggling once
the Embedded Program algorithm is complete.
Table 15, on page 33
Toggle Bit I on DQ6.
shows the toggle bit algorithm.
page 45
shows the toggle bit timing diagrams.
22, on page 45
DQ2 and DQ6 in graphical form. See also the
subsection on DQ2: Toggle Bit II.
Note: The system should recheck the toggle bit
even if DQ5 = “1” because the toggle bit may stop
toggling as DQ5 changes to “1.” See the subsections
on DQ6 and DQ2 for more information.
No
Figure 7. Toggle Bit Algorithm
in the
Reset Command
Complete, Write
Read DQ7–DQ0
Read DQ7–DQ0
Read DQ7–DQ0
Program/Erase
Operation Not
Toggle Bit
Toggle Bit
= Toggle?
DQ5 = 1?
= Toggle?
START
Twice
shows the differences between
“AC Characteristics”
Yes
Yes
Yes
shows the outputs for
Figure 7, on page 31
Operation Complete
No
No
Program/Erase
Figure 21, on
section
Figure
31