AM29LV320DT90EI AMD (ADVANCED MICRO DEVICES), AM29LV320DT90EI Datasheet - Page 11
![no-image](/images/manufacturer_photos/0/0/44/amd__advanced_micro_devices__sml.jpg)
AM29LV320DT90EI
Manufacturer Part Number
AM29LV320DT90EI
Description
Flash Memory IC
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheets
1.AM29LV320DT90EI.pdf
(55 pages)
2.AM29LV320DT90EI.pdf
(55 pages)
3.AM29LV320DT90EI.pdf
(57 pages)
Specifications of AM29LV320DT90EI
Memory Configuration
4M X 8 / 2M X 16 Bit
Package/case
48-TSOP
Supply Voltage Max
3.6V
Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Access Time, Tacc
90nS
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DEVICE BUS OPERATIONS
This section describes the requirements and
use of the device bus operations, which are ini-
tiated through the internal command register.
The command register itself does not occupy
any addressable memory location. The register
is a latch used to store the commands, along
with the address and data information needed
to execute the command. The contents of the
Legend: L = Logic Low = V
= Sector Address, A
Notes:
1. Addresses are A20:A0 in word mode (BYTE# = V
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See
3. If WP#/ACC = V
4. D
Word/Byte Configuration
The BYTE# pin controls whether the device
data I/O pins operate in the byte or word con-
figuration. If the BYTE# pin is set at logic ‘1’,
the device is in word configuration, DQ0–DQ15
are active and controlled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is
in byte configuration, and only data I/O pins
DQ0–DQ7 are active and controlled by CE# and
O E # . T h e d a t a I / O p i n s D Q 8 – D Q 1 4 a r e
November 15, 2004
Read
Write
Accelerated Program
Standby
Output Disable
Reset
Sector Protect (Note 2)
Sector Unprotect
(Note 2)
Temporary Sector
Unprotect
“Sector/Sector Block Protection and Unprotection” on page
sector protection depends on whether they were last protected or unprotected using the method described in
“Sector/Sector Block Protection and Unprotection” on page
IN
Operation
or D
OUT
as required by command sequence, data polling, or sector protection algorithm.
IL
IN
, the two outermost boot sectors remain protected. If WP#/ACC = V
= Address In, D
CE# OE#
0.3 V
V
CC
L
L
L
L
X
L
L
X
±
Table 1. Am29LV320D Device Bus Operations
IL
, H = Logic High = V
H
H
H
H
H
X
X
X
L
WE
#
H
X
H
X
X
L
L
L
L
IN
= Data In, D
RESET
0.3 V
V
V
V
V
CC
#
H
H
H
H
L
ID
ID
ID
±
Am29LV320D
IH
, V
WP#/AC
IH
(Note 3)
(Note 3)
(Note 3)
OUT
ID
), A20:A-1 in byte mode (BYTE# = V
L/H
V
L/H
L/H
L/H
C
H
= 11.5–12.5 V, V
HH
= Data Out
register serve as inputs to the internal state
machine. The state machine outputs dictate the
function of the device.
bus operations, the inputs and control levels
they require, and the resulting output. The fol-
lowing subsections describe each of these oper-
ations in further detail.
tri-stated, and the DQ15 pin is used as an input
for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the sys-
tem must drive the CE# and OE# pins to V
CE# is the power control and selects the de-
vice. OE# is the output control and gates array
data to the output pins. WE# should remain at
V
vice outputs array data in words or bytes.
IH
17.
17. If WP#/ACC = V
. The BYTE# pin determines whether the de-
A1 = H, A0 = L
A1 = H, A0 = L
Addresses
SA, A6 = H,
SA, A6 = L,
(Note 2)
A
A
A
A
X
X
X
IN
IN
IN
IN
HH
= 11.5–12.5 V, X = Don’t Care, SA
(Note 4) (Note 4)
(Note 4) (Note 4)
(Note 4)
(Note 4)
(Note 4) (Note 4)
DQ0–
High-Z
High-Z
High-Z
DQ7
D
HH
OUT
, all sectors are unprotected.
Table 1
IH
, the two outermost boot
High-Z
High-Z
High-Z
BYTE
= V
D
#
OUT
X
X
IL
IH
).
DQ8–DQ15
lists the device
DQ15 = A-1
DQ8–DQ14
= High-Z,
BYTE#
High-Z
High-Z
High-Z
High-Z
= V
X
X
IL
IL
11
.