ADV7177KSZ-REEL Analog Devices Inc, ADV7177KSZ-REEL Datasheet - Page 18

IC,TV/VIDEO CIRCUIT,Color Encoder Circuit,CMOS,QFP,44PIN,PLASTIC

ADV7177KSZ-REEL

Manufacturer Part Number
ADV7177KSZ-REEL
Description
IC,TV/VIDEO CIRCUIT,Color Encoder Circuit,CMOS,QFP,44PIN,PLASTIC
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7177KSZ-REEL

Applications
Set-Top Boxes, TV
Voltage - Supply, Analog
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7177KSZ-REEL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADV7177KSZ-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADV7177/ADV7178
TIMING AND CONTROL
Mode 0 (CCIR-656): Slave Option
Timing Register 0 TR0 = X X X X X 0 0 0
The ADV7177/ADV7178 are controlled by the start active video (SAV) and end active video (EAV) time codes in the pixel data. All
timing information is transmitted using a 4-byte synchronization pattern. A synchronization pattern is sent immediately before and after
each line during active picture and retrace. Mode 0 is illustrated in Figure 14. The HSYNC , FIELD/ VSYNC , and BLANK (if not used)
pins should be tied high during this mode.
Mode 0 (Ccir-656): Master Option
Timing Register 0 TR0 = X X X X X 0 0 1
The ADV7177/ADV7178 generate H, V, and F signals required for the SAV and EAV time codes in the CCIR-656 standard. The H bit is
output on the HSYNC pin, the V bit is output on the BLANK pin, and the F bit is output on the FIELD/ VSYNC pin. Mode 0 is illustrated
in Figure 15 (NTSC) and Figure 16 (PAL). The H, V, and F transitions relative to the video waveform are illustrated in Figure 17.
H
H
V
V
F
F
522
260
DISPLAY
DISPLAY
NTSC/PAL M SYSTEM
523
261
(525 LlNES/60Hz)
(625 LINES/50Hz)
INPUT PIXELS
PAL SYSTEM
524
262
ANALOG
VIDEO
525
263
264
1
ODD FIELD
END OF ACTIVE
Y
VIDEO LINE
C
r
265
Y
EVEN FIELD
2
F 0 0 X 8 1 8 1
F 0 0 Y 0 0 0 0
4 CLOCK
4 CLOCK
EAV CODE
266
EVEN FIELD
3
Figure 15. Timing Mode 0 (NTSC Master Mode)
Figure 14. Timing Mode 0 (Slave Mode)
ODD FIELD
267
4
268
Rev. C | Page 18 of 44
5
VERTICAL BLANK
ANCILLARY DATA
0
0
268 CLOCK
280 CLOCK
269
VERTICAL BLANK
6
F
F
(HANC)
F A A A
F B B B
270
7
271
8
8 1 8 1 F 0 0 X C
0 0 0 0 F 0 0 Y b
272
9
SAV CODE
4 CLOCK
4 CLOCK
START OF ACTIVE
273
10
VIDEO LINE
274
11
Y
1440 CLOCK
1440 CLOCK
C
r
Y
C
b
Y
283
20
C
r
Y
C
b
284
21
DISPLAY
DISPLAY
285
22

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